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authorPeng Fan <Peng.Fan@freescale.com>2015-03-10 15:35:46 +0800
committerTom Rini <trini@konsulko.com>2015-03-17 09:09:47 -0400
commit323aaaa1e364bf8426a9c8fd5158fe2d155ae7b9 (patch)
tree47ed08f6a8fef467825e772af94e2e71c3cf5c3c /drivers
parent6c67018f9675b3ae453dc6f63c84cd0da05301f7 (diff)
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mmc: fsl_esdhc fix register offset
Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces error register offset. Change the "char reserved3[59]" to "char reserved3[56]". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/fsl_esdhc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index c5e270d..db4d251 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -56,7 +56,7 @@ struct fsl_esdhc {
uint adsaddr; /* ADMA system address register */
char reserved2[100]; /* reserved */
uint vendorspec; /* Vendor Specific register */
- char reserved3[59]; /* reserved */
+ char reserved3[56]; /* reserved */
uint hostver; /* Host controller version register */
char reserved4[4]; /* reserved */
uint dmaerraddr; /* DMA error address register */