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authorwdenk <wdenk>2004-03-14 15:20:55 +0000
committerwdenk <wdenk>2004-03-14 15:20:55 +0000
commitaaf224ab4ec400abefa17982cbd2ae995adc9978 (patch)
tree68a329c03bf5b31851c26a7bc6f48e6931fd6c82 /drivers
parent3d3befa754fedb320f779320ac0ab11deb0a6275 (diff)
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* Patch by Stephan Linz, 09 Mar 2004
- Add support for the SSV ADNP/ESC1 (Nios Softcore) * Patch by George G. Davis, 9 Mar 2004: fix recent build failure for SA1100 target * Patch by Travis Sawyer, 09 Mar 2004: Support native interrupt mode for the IBM440GX. Previously it was running in 440GP compatibility mode.
Diffstat (limited to 'drivers')
-rw-r--r--drivers/smc91111.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/smc91111.h b/drivers/smc91111.h
index 1d9555e..c5d0271 100644
--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -143,10 +143,18 @@ typedef unsigned long int dword;
* We have only 16 Bit PCMCIA access on Socket 0
*/
+#ifdef CONFIG_ADNPESC1
+#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
+#else
#define SMC_inw(r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))))
+#endif
#define SMC_inb(r) (((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF)
+#ifdef CONFIG_ADNPESC1
+#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
+#else
#define SMC_outw(d,r) (*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
+#endif
#define SMC_outb(d,r) ({ word __d = (byte)(d); \
word __w = SMC_inw((r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
@@ -311,6 +319,11 @@ typedef unsigned long int dword;
#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \
| (RPC_LED_TX_RX << RPC_LSXA_SHFT) \
| (RPC_LED_100_10 << RPC_LSXB_SHFT) )
+#elif defined(CONFIG_ADNPESC1)
+/* SSV ADNP/ESC1 has only one LED: LEDa -> Rx/Tx indicator */
+#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \
+ | (RPC_LED_TX_RX << RPC_LSXA_SHFT) \
+ | (RPC_LED_100_10 << RPC_LSXB_SHFT) )
#else
/* SMSC reference design: LEDa --> green, LEDb --> yellow */
#define RPC_DEFAULT ( RPC_SPEED | RPC_DPLX | RPC_ANEG \