summaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorIra Snyder <iws@ovro.caltech.edu>2011-12-23 08:30:40 +0000
committerAndy Fleming <afleming@freescale.com>2012-01-08 21:28:28 -0600
commit8eee2bd7f484c4933c4e3112c3c3db886ac945ca (patch)
treeaf4e09bdd1926cc3b42dd7b8afc38b9f2cb65554 /drivers
parentbf83662ba3a8586e52d3cfee1d82d5e06b61eefc (diff)
downloadu-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.zip
u-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.tar.gz
u-boot-imx-8eee2bd7f484c4933c4e3112c3c3db886ac945ca.tar.bz2
fsl_esdhc: fix PIO mode transfers
The pointer to the registers used to control the Freescale ESDHC MMC controller is not initialized correctly when using PIO mode. This is fixed by initializing the pointer in the same way as all other sites within the driver. Examining the commit history shows that this was broken at introduction due to a code change in upstream U-Boot to support the mx51 processor family. Reported-by: Jim Lentz <JLentz@zhone.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/fsl_esdhc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 1ed5355..a2f35e3 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -114,7 +114,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
static void
esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
{
- struct fsl_esdhc *regs = mmc->priv;
+ struct fsl_esdhc_cfg *cfg = mmc->priv;
+ struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
uint blocks;
char *buffer;
uint databuf;