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authorMichael Walle <michael@walle.cc>2011-05-11 12:22:46 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-05-23 08:58:32 +0200
commit70c55f5ab324d43093f1c8745462d92042b7306d (patch)
tree6ac867ca81e4def827068aeb8729149c9d92becf /drivers
parentd2d945714daeaabeaf83ddc63a1c938d9f98ee21 (diff)
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mvsata: issue hard reset on initialization
Before the actual initialization do a hard reset of the SATA port and the connected device. changes v1->v2: - add comment for udelay Signed-off-by: Michael Walle <michael@walle.cc> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/block/mvsata_ide.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c
index e0e4097..1be395f 100644
--- a/drivers/block/mvsata_ide.c
+++ b/drivers/block/mvsata_ide.c
@@ -33,7 +33,9 @@
/* SATA port registers */
struct mvsata_port_registers {
- u32 reserved1[192];
+ u32 reserved0[10];
+ u32 edma_cmd;
+ u32 reserved1[181];
/* offset 0x300 : ATA Interface registers */
u32 sstatus;
u32 serror;
@@ -76,6 +78,7 @@ struct mvsata_port_registers {
* and for SStatus DETection.
*/
+#define MVSATA_EDMA_CMD_ATA_RST 0x00000004
#define MVSATA_SCONTROL_DET_MASK 0x0000000F
#define MVSATA_SCONTROL_DET_NONE 0x00000000
#define MVSATA_SCONTROL_DET_INIT 0x00000001
@@ -115,6 +118,11 @@ static int mvsata_ide_initialize_port(struct mvsata_port_registers *port)
u32 status;
u32 timeleft = 10000; /* wait at most 10 ms for SATA reset to complete */
+ /* Hard reset */
+ writel(MVSATA_EDMA_CMD_ATA_RST, &port->edma_cmd);
+ udelay(25); /* taken from original marvell port */
+ writel(0, &port->edma_cmd);
+
/* Set control IPM to 3 (no low power) and DET to 1 (initialize) */
control = readl(&port->scontrol);
control = (control & ~MVSATA_SCONTROL_MASK) | MVSATA_PORT_INIT;