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authorWolfgang Denk <wd@denx.de>2010-04-08 00:06:31 +0200
committerWolfgang Denk <wd@denx.de>2010-04-08 00:06:31 +0200
commit6a1f7e54c2dd8888dbc118e8de372dec29a0a9c5 (patch)
treedf5b6d67be790d75e60f8fcd97360fc1f179ab0d /drivers
parentd8bc0a2889700ba063598de6d4e7d135360b537e (diff)
parentb5045cdda556c73e2697cd1d3ea6563315cbf490 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/host/ohci-at91.c28
-rw-r--r--drivers/watchdog/at91sam9_wdt.c21
2 files changed, 24 insertions, 25 deletions
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 29f3ba1..b2e03bc 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -25,11 +25,6 @@
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
-#ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
-#endif
-
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_pmc.h>
@@ -37,22 +32,23 @@
int usb_cpu_init(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
defined(CONFIG_AT91SAM9261)
/* Enable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, get_pllb_init());
- while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+ writel(get_pllb_init(), &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
;
#endif
/* Enable USB host clock. */
- at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
+ writel(1 << AT91_ID_UHP, &pmc->pcer);
#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP | AT91_PMC_HCK0);
+ writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
#else
- at91_sys_write(AT91_PMC_SCER, AT91_PMC_UHP);
+ writel(AT91_PMC_UHP, &pmc->scer);
#endif
return 0;
@@ -60,19 +56,21 @@ int usb_cpu_init(void)
int usb_cpu_stop(void)
{
+ at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
+
/* Disable USB host clock. */
- at91_sys_write(AT91_PMC_PCDR, 1 << AT91_ID_UHP);
+ writel(1 << AT91_ID_UHP, &pmc->pcdr);
#ifdef CONFIG_AT91SAM9261
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP | AT91_PMC_HCK0);
+ writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
#else
- at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
+ writel(AT91_PMC_UHP, &pmc->scdr);
#endif
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
/* Disable PLLB */
- at91_sys_write(AT91_CKGR_PLLBR, 0);
- while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
+ writel(0, &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
;
#endif
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 5bb8b77..25afae7 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -42,11 +42,10 @@
static int at91_wdt_settimeout(unsigned int timeout)
{
unsigned int reg;
- unsigned int mr;
+ at91_wdt_t *wd = (at91_wdt_t *) AT91_WDT_BASE;
/* Check if disabled */
- mr = at91_sys_read(AT91_WDT_MR);
- if (mr & AT91_WDT_WDDIS) {
+ if (readl(&wd->mr) & AT91_WDT_MR_WDDIS) {
printf("sorry, watchdog is disabled\n");
return -1;
}
@@ -57,19 +56,21 @@ static int at91_wdt_settimeout(unsigned int timeout)
* Since WDV is a 12-bit counter, the maximum period is
* 4096 / 256 = 16 seconds.
*/
- reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
- /* | AT91_WDT_WDRPROC causes processor reset only */
- | AT91_WDT_WDDBGHLT /* disabled in debug mode */
- | AT91_WDT_WDD /* restart at any time */
- | (timeout & AT91_WDT_WDV); /* timer value */
- at91_sys_write(AT91_WDT_MR, reg);
+
+ reg = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
+ | AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
+ | AT91_WDT_MR_WDD(0xfff) /* restart at any time */
+ | AT91_WDT_MR_WDV(timeout); /* timer value */
+
+ writel(reg, &wd->mr);
return 0;
}
void hw_watchdog_reset(void)
{
- at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
+ at91_wdt_t *wd = (at91_wdt_t *) AT91_WDT_BASE;
+ writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, &wd->cr);
}
void hw_watchdog_init(void)