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authorTom Rini <trini@ti.com>2014-02-21 08:00:22 -0500
committerTom Rini <trini@ti.com>2014-02-21 08:00:22 -0500
commit4c89a369c7cd6e7ad3adec4601cfa69fec476164 (patch)
tree79beb1aa83998aa8beb9fe29b5930deb1235d68e /drivers
parent36ae5cd2a824597b4c53b045ac0f4c1e3b4eaf65 (diff)
parent9ea09e20376abbca21760ed4ba87d6b5c4df465c (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-spi
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/mxc_spi.c9
-rw-r--r--drivers/spi/ti_qspi.c33
-rw-r--r--drivers/spi/xilinx_spi.c8
3 files changed, 42 insertions, 8 deletions
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 95dd03f..f3f029d 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -115,7 +115,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
{
u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
s32 reg_ctrl, reg_config;
- u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, pre_div = 0, post_div = 0;
+ u32 ss_pol = 0, sclkpol = 0, sclkpha = 0, sclkctl = 0;
+ u32 pre_div = 0, post_div = 0;
struct cspi_regs *regs = (struct cspi_regs *)mxcs->base;
if (max_hz == 0) {
@@ -164,8 +165,10 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
if (mode & SPI_CS_HIGH)
ss_pol = 1;
- if (mode & SPI_CPOL)
+ if (mode & SPI_CPOL) {
sclkpol = 1;
+ sclkctl = 1;
+ }
if (mode & SPI_CPHA)
sclkpha = 1;
@@ -180,6 +183,8 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
(ss_pol << (cs + MXC_CSPICON_SSPOL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_POL))) |
(sclkpol << (cs + MXC_CSPICON_POL));
+ reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_CTL))) |
+ (sclkctl << (cs + MXC_CSPICON_CTL));
reg_config = (reg_config & ~(1 << (cs + MXC_CSPICON_PHA))) |
(sclkpha << (cs + MXC_CSPICON_PHA));
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 5a5b482..dfa5d0c 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -11,6 +11,8 @@
#include <asm/arch/omap.h>
#include <malloc.h>
#include <spi.h>
+#include <asm/gpio.h>
+#include <asm/omap_gpio.h>
/* ti qpsi register bit masks */
#define QSPI_TIMEOUT 2000000
@@ -39,7 +41,8 @@
#define MM_SWITCH 0x01
#define MEM_CS 0x100
#define MEM_CS_UNSELECT 0xfffff0ff
-#define MMAP_START_ADDR 0x5c000000
+#define MMAP_START_ADDR_DRA 0x5c000000
+#define MMAP_START_ADDR_AM43x 0x30000000
#define CORE_CTRL_IO 0x4a002558
#define QSPI_CMD_READ (0x3 << 0)
@@ -99,7 +102,11 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
struct spi_slave *slave = &qslave->slave;
u32 memval = 0;
- slave->memory_map = (void *)MMAP_START_ADDR;
+#ifdef CONFIG_DRA7XX
+ slave->memory_map = (void *)MMAP_START_ADDR_DRA;
+#else
+ slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
+#endif
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |
@@ -165,6 +172,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
{
struct ti_qspi_slave *qslave;
+#ifdef CONFIG_AM43XX
+ gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio");
+ gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1);
+#endif
+
qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs);
if (!qslave) {
printf("SPI_error: Fail to allocate ti_qspi_slave\n");
@@ -229,7 +241,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
const uchar *txp = dout;
uchar *rxp = din;
uint status;
- int timeout, val;
+ int timeout;
+
+#ifdef CONFIG_DRA7XX
+ int val;
+#endif
debug("spi_xfer: bus:%i cs:%i bitlen:%i words:%i flags:%lx\n",
slave->bus, slave->cs, bitlen, words, flags);
@@ -237,15 +253,19 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
/* Setup mmap flags */
if (flags & SPI_XFER_MMAP) {
writel(MM_SWITCH, &qslave->base->memswitch);
+#ifdef CONFIG_DRA7XX
val = readl(CORE_CTRL_IO);
val |= MEM_CS;
writel(val, CORE_CTRL_IO);
+#endif
return 0;
} else if (flags & SPI_XFER_MMAP_END) {
writel(~MM_SWITCH, &qslave->base->memswitch);
+#ifdef CONFIG_DRA7XX
val = readl(CORE_CTRL_IO);
val &= MEM_CS_UNSELECT;
writel(val, CORE_CTRL_IO);
+#endif
return 0;
}
@@ -265,6 +285,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
qslave->cmd |= QSPI_3_PIN;
qslave->cmd |= 0xfff;
+/* FIXME: This delay is required for successfull
+ * completion of read/write/erase. Once its root
+ * caused, it will be remove from the driver.
+ */
+#ifdef CONFIG_AM43XX
+ udelay(100);
+#endif
while (words--) {
if (txp) {
debug("tx cmd %08x dc %08x data %02x\n",
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 5ac0184..56d99d1 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -149,6 +149,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
const unsigned char *txp = dout;
unsigned char *rxp = din;
unsigned rxecount = 17; /* max. 16 elements in FIFO, leftover 1 */
+ unsigned global_timeout;
debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
slave->bus, slave->cs, bitlen, bytes, flags);
@@ -176,11 +177,12 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
- while (bytes--) {
- unsigned timeout = /* at least 1usec or greater, leftover 1 */
- xilspi->freq > XILSPI_MAX_XFER_BITS * 1000000 ? 2 :
+ /* at least 1usec or greater, leftover 1 */
+ global_timeout = xilspi->freq > XILSPI_MAX_XFER_BITS * 1000000 ? 2 :
(XILSPI_MAX_XFER_BITS * 1000000 / xilspi->freq) + 1;
+ while (bytes--) {
+ unsigned timeout = global_timeout;
/* get Tx element from data out buffer and count up */
unsigned char d = txp ? *txp++ : CONFIG_XILINX_SPI_IDLE_VAL;
debug("%s: tx:%x ", __func__, d);