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authorAllen Xu <b45815@freescale.com>2015-01-19 11:10:15 -0600
committerFrank Li <Frank.Li@freescale.com>2015-02-04 21:53:32 +0800
commit71779872ed7072f0ca90dd4db776dd8960b595f4 (patch)
treef8236d7819942904138b4a0087d7b27bb87a9ed6 /drivers
parent13cdb96bc52b3079ba91a08c1704307e5598ee59 (diff)
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MLK-10178-9 qspi:fsl_qspi txfifo min size 16bytes for mx7
Fix the TXFIFO need to be filled to 16 bytes limitation for i.MX7D Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Allen Xu <b45815@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/fsl_qspi.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 8439dbd..de9cb41 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -1,7 +1,7 @@
/*
* Freescale QuadSPI driver.
*
- * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -785,7 +785,7 @@ static void fsl_qspi_ip_read(struct fsl_qspi *q, int len, u8 *rxbuf)
static void fsl_qspi_write_data(struct fsl_qspi *q, int len, u8* txbuf)
{
u32 tmp;
- u32 t1, t2;
+ u32 t1, t2, t3;
int j;
/* clear the TX FIFO. */
@@ -795,6 +795,7 @@ static void fsl_qspi_write_data(struct fsl_qspi *q, int len, u8* txbuf)
/* fill the TX data to the FIFO */
t2 = len % 4;
t1 = len >> 2; /* 4 Bytes aligned */
+ t3 = t1 + t2;
for (j = 0; j < t1; j++) {
memcpy(&tmp, txbuf, 4);
@@ -809,6 +810,13 @@ static void fsl_qspi_write_data(struct fsl_qspi *q, int len, u8* txbuf)
tmp = fsl_qspi_endian_xchg(q, tmp);
writel(tmp, q->iobase + QUADSPI_TBDR);
}
+
+#if defined(CONFIG_MX7D)
+ /* iMX7D TXFIFO must be at least 16 bytes*/
+ for (; t3 < 4; t3++)
+ writel(tmp, q->iobase + QUADSPI_TBDR);
+#endif
+
}
/* see the spi_flash_read_write() */