Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:
	board/samsung/trats2/trats2.c
	include/configs/exynos5250-dt.h

Signed-off-by: Tom Rini <trini@ti.com>

15 files changed, 193 insertions, 72 deletions

diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index 0daad36..e64df4f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
@@ -379,6 +379,11 @@ static int ahci_init_one(pci_dev_t pdev)
 	int rc;
 
 	probe_ent = malloc(sizeof(struct ahci_probe_ent));
+	if (!probe_ent) {
+		printf("%s: No memory for probe_ent\n", __func__);
+		return -ENOMEM;
+	}
+
 	memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 	probe_ent->dev = pdev;
 
@@ -503,7 +508,7 @@ static int ahci_port_start(u8 port)
 	mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
 	if (!mem) {
 		free(pp);
-		printf("No mem for table!\n");
+		printf("%s: No mem for table!\n", __func__);
 		return -ENOMEM;
 	}
 
@@ -618,7 +623,7 @@ static int ata_scsiop_inquiry(ccb *pccb)
 		95 - 4,
 	};
 	u8 fis[20];
-	u16 *tmpid;
+	ALLOC_CACHE_ALIGN_BUFFER(u16, tmpid, ATA_ID_WORDS);
 	u8 port;
 
 	/* Clean ccb data buffer */
@@ -637,14 +642,10 @@ static int ata_scsiop_inquiry(ccb *pccb)
 
 	/* Read id from sata */
 	port = pccb->target;
-	tmpid = malloc(ATA_ID_WORDS * 2);
-	if (!tmpid)
-		return -ENOMEM;
 
 	if (ahci_device_data_io(port, (u8 *) &fis, sizeof(fis), (u8 *)tmpid,
 				ATA_ID_WORDS * 2, 0)) {
 		debug("scsi_ahci: SCSI inquiry command failure.\n");
-		free(tmpid);
 		return -EIO;
 	}
 
@@ -889,6 +890,11 @@ int ahci_init(u32 base)
 	u32 linkmap;
 
 	probe_ent = malloc(sizeof(struct ahci_probe_ent));
+	if (!probe_ent) {
+		printf("%s: No memory for probe_ent\n", __func__);
+		return -ENOMEM;
+	}
+
 	memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 
 	probe_ent->host_flags = ATA_FLAG_SATA
diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile
index 8256ed0..bed6971 100644
--- a/drivers/bootcount/Makefile
+++ b/drivers/bootcount/Makefile
@@ -6,5 +6,6 @@ obj-y				+= bootcount.o
 obj-$(CONFIG_AT91SAM9XE)	+= bootcount_at91.o
 obj-$(CONFIG_BLACKFIN)		+= bootcount_blackfin.o
 obj-$(CONFIG_SOC_DA8XX)		+= bootcount_davinci.o
-obj-$(CONFIG_AM33XX)		+= bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_AM33XX)	+= bootcount_davinci.o
 obj-$(CONFIG_BOOTCOUNT_RAM)	+= bootcount_ram.o
+obj-$(CONFIG_BOOTCOUNT_ENV)	+= bootcount_env.o
diff --git a/drivers/bootcount/bootcount_davinci.c b/drivers/bootcount/bootcount_davinci.c
index f0acfad..fa87b5e 100644
--- a/drivers/bootcount/bootcount_davinci.c
+++ b/drivers/bootcount/bootcount_davinci.c
@@ -2,6 +2,10 @@
  * (C) Copyright 2011
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  *
+ * A bootcount driver for the RTC IP block found on many TI platforms.
+ * This requires the RTC clocks, etc, to be enabled prior to use and
+ * not all boards with this IP block on it will have the RTC in use.
+ *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
diff --git a/drivers/bootcount/bootcount_env.c b/drivers/bootcount/bootcount_env.c
new file mode 100644
index 0000000..2d6e8db
--- /dev/null
+++ b/drivers/bootcount/bootcount_env.c
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2013
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+void bootcount_store(ulong a)
+{
+	int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+
+	if (upgrade_available) {
+		setenv_ulong("bootcount", a);
+		saveenv();
+	}
+}
+
+ulong bootcount_load(void)
+{
+	int upgrade_available = getenv_ulong("upgrade_available", 10, 0);
+	ulong val = 0;
+
+	if (upgrade_available)
+		val = getenv_ulong("bootcount", 10, 0);
+
+	return val;
+}
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index af09786..8b76666 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -14,6 +14,7 @@
 #include <asm/sizes.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pio.h>
+#include <asm/arch/gpio.h>
 
 static struct at91_port *at91_pio_get_port(unsigned port)
 {
@@ -356,9 +357,6 @@ int at91_get_pio_value(unsigned port, unsigned pin)
 
 /* Common GPIO API */
 
-#define at91_gpio_to_port(gpio)		(gpio / 32)
-#define at91_gpio_to_pin(gpio)		(gpio % 32)
-
 int gpio_request(unsigned gpio, const char *label)
 {
 	return 0;
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index 396fea8..dfea54a 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -25,7 +25,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_pio.h>
-#ifdef CONFIG_AT91_LEGACY
+#ifdef CONFIG_ATMEL_LEGACY
 #include <asm/arch/gpio.h>
 #endif
 #endif
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 16b7df0..05ddfbb 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -12,9 +12,8 @@
  */
 
 #include <common.h>
-#include <asm/arch/hardware.h>
+#include <asm/gpio.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
 
 #include <malloc.h>
 #include <nand.h>
@@ -1154,8 +1153,7 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
 			IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE;
 
 #ifdef CONFIG_SYS_NAND_ENABLE_PIN
-		at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN,
-				    !(ctrl & NAND_NCE));
+		gpio_set_value(CONFIG_SYS_NAND_ENABLE_PIN, !(ctrl & NAND_NCE));
 #endif
 		this->IO_ADDR_W = (void *) IO_ADDR_W;
 	}
@@ -1167,7 +1165,7 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd,
 #ifdef CONFIG_SYS_NAND_READY_PIN
 static int at91_nand_ready(struct mtd_info *mtd)
 {
-	return at91_get_gpio_value(CONFIG_SYS_NAND_READY_PIN);
+	return gpio_get_value(CONFIG_SYS_NAND_READY_PIN);
 }
 #endif
 
diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c
index 73612ea..64d4c56 100644
--- a/drivers/net/at91_emac.c
+++ b/drivers/net/at91_emac.c
@@ -10,19 +10,10 @@
 
 #include <common.h>
 #include <asm/io.h>
-#ifndef CONFIG_AT91_LEGACY
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_emac.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/at91_pio.h>
-#else
-/* remove next 5 lines, if all RM9200 boards convert to at91 arch */
-#include <asm/arch-at91/at91rm9200.h>
-#include <asm/arch-at91/hardware.h>
-#include <asm/arch-at91/at91_emac.h>
-#include <asm/arch-at91/at91_pmc.h>
-#include <asm/arch-at91/at91_pio.h>
-#endif
 #include <net.h>
 #include <netdev.h>
 #include <malloc.h>
diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c
index 39240d9..50167aa 100644
--- a/drivers/net/cpsw.c
+++ b/drivers/net/cpsw.c
@@ -914,7 +914,7 @@ static int cpsw_recv(struct eth_device *dev)
 	void *buffer;
 	int len;
 
-	cpsw_update_link(priv);
+	cpsw_check_link(priv);
 
 	while (cpdma_process(priv, &priv->rx_chan, &buffer, &len) >= 0) {
 		invalidate_dcache_range((unsigned long)buffer,
diff --git a/drivers/power/twl6030.c b/drivers/power/twl6030.c
index 0858b60..a1c6663 100644
--- a/drivers/power/twl6030.c
+++ b/drivers/power/twl6030.c
@@ -9,6 +9,26 @@
 
 #include <twl6030.h>
 
+static struct twl6030_data *twl;
+
+static struct twl6030_data twl6030_info = {
+	.chip_type	= chip_TWL6030,
+	.adc_rbase	= GPCH0_LSB,
+	.adc_ctrl	= CTRL_P2,
+	.adc_enable	= CTRL_P2_SP2,
+	.vbat_mult	= TWL6030_VBAT_MULT,
+	.vbat_shift	= TWL6030_VBAT_SHIFT,
+};
+
+static struct twl6030_data twl6032_info = {
+	.chip_type	= chip_TWL6032,
+	.adc_rbase	= TWL6032_GPCH0_LSB,
+	.adc_ctrl	= TWL6032_CTRL_P1,
+	.adc_enable	= CTRL_P1_SP1,
+	.vbat_mult	= TWL6032_VBAT_MULT,
+	.vbat_shift	= TWL6032_VBAT_SHIFT,
+};
+
 static int twl6030_gpadc_read_channel(u8 channel_no)
 {
 	u8 lsb = 0;
@@ -16,12 +36,12 @@ static int twl6030_gpadc_read_channel(u8 channel_no)
 	int ret = 0;
 
 	ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC,
-				  GPCH0_LSB + channel_no * 2, &lsb);
+				  twl->adc_rbase + channel_no * 2, &lsb);
 	if (ret)
 		return ret;
 
 	ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC,
-				  GPCH0_MSB + channel_no * 2, &msb);
+				  twl->adc_rbase + 1 + channel_no * 2, &msb);
 	if (ret)
 		return ret;
 
@@ -33,7 +53,8 @@ static int twl6030_gpadc_sw2_trigger(void)
 	u8 val;
 	int ret = 0;
 
-	ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC, CTRL_P2, CTRL_P2_SP2);
+	ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC,
+				   twl->adc_ctrl, twl->adc_enable);
 	if (ret)
 		return ret;
 
@@ -41,7 +62,8 @@ static int twl6030_gpadc_sw2_trigger(void)
 	val =  CTRL_P2_BUSY;
 
 	while (!((val & CTRL_P2_EOCP2) && (!(val & CTRL_P2_BUSY)))) {
-		ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC, CTRL_P2, &val);
+		ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC,
+					  twl->adc_ctrl, &val);
 		if (ret)
 			return ret;
 		udelay(1000);
@@ -102,6 +124,18 @@ int twl6030_get_battery_voltage(void)
 {
 	int battery_volt = 0;
 	int ret = 0;
+	u8 vbatch;
+
+	if (twl->chip_type == chip_TWL6030) {
+		vbatch = TWL6030_GPADC_VBAT_CHNL;
+	} else {
+		ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC,
+					   TWL6032_GPSELECT_ISB,
+					   TWL6032_GPADC_VBAT_CHNL);
+		if (ret)
+			return ret;
+		vbatch = 0;
+	}
 
 	/* Start GPADC SW conversion */
 	ret = twl6030_gpadc_sw2_trigger();
@@ -111,12 +145,12 @@ int twl6030_get_battery_voltage(void)
 	}
 
 	/* measure Vbat voltage */
-	battery_volt = twl6030_gpadc_read_channel(7);
+	battery_volt = twl6030_gpadc_read_channel(vbatch);
 	if (battery_volt < 0) {
 		printf("Failed to read battery voltage\n");
 		return ret;
 	}
-	battery_volt = (battery_volt * 25 * 1000) >> (10 + 2);
+	battery_volt = (battery_volt * twl->vbat_mult) >> twl->vbat_shift;
 	printf("Battery Voltage: %d mV\n", battery_volt);
 
 	return battery_volt;
@@ -124,12 +158,35 @@ int twl6030_get_battery_voltage(void)
 
 void twl6030_init_battery_charging(void)
 {
-	u8 stat1 = 0;
+	u8 val = 0;
 	int battery_volt = 0;
 	int ret = 0;
 
+	ret = twl6030_i2c_read_u8(TWL6030_CHIP_USB, USB_PRODUCT_ID_LSB, &val);
+	if (ret) {
+		puts("twl6030_init_battery_charging(): could not determine chip!\n");
+		return;
+	}
+	if (val == 0x30) {
+		twl = &twl6030_info;
+	} else if (val == 0x32) {
+		twl = &twl6032_info;
+	} else {
+		puts("twl6030_init_battery_charging(): unsupported chip type\n");
+		return;
+	}
+
 	/* Enable VBAT measurement */
-	twl6030_i2c_write_u8(TWL6030_CHIP_PM, MISC1, VBAT_MEAS);
+	if (twl->chip_type == chip_TWL6030) {
+		twl6030_i2c_write_u8(TWL6030_CHIP_PM, MISC1, VBAT_MEAS);
+		twl6030_i2c_write_u8(TWL6030_CHIP_ADC,
+				     TWL6030_GPADC_CTRL,
+				     GPADC_CTRL_SCALER_DIV4);
+	} else {
+		twl6030_i2c_write_u8(TWL6030_CHIP_ADC,
+				     TWL6032_GPADC_CTRL2,
+				     GPADC_CTRL2_CH18_SCALER_EN);
+	}
 
 	/* Enable GPADC module */
 	ret = twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, TOGGLE1, FGS | GPADCS);
@@ -146,10 +203,10 @@ void twl6030_init_battery_charging(void)
 		printf("Main battery voltage too low!\n");
 
 	/* Check for the presence of USB charger */
-	twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, CONTROLLER_STAT1, &stat1);
+	twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, CONTROLLER_STAT1, &val);
 
 	/* check for battery presence indirectly via Fuel gauge */
-	if ((stat1 & VBUS_DET) && (battery_volt < 3300))
+	if ((val & VBUS_DET) && (battery_volt < 3300))
 		twl6030_start_usb_charging();
 
 	return;
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index 8dc3d9f..dd95afe 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -147,6 +147,23 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 	return 0;
 }
 
+__weak int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	return gcnum;
+}
+
+static int g_dnl_get_bcd_device_number(struct usb_composite_dev *cdev)
+{
+	struct usb_gadget *gadget = cdev->gadget;
+	int gcnum;
+
+	gcnum = usb_gadget_controller_number(gadget);
+	if (gcnum > 0)
+		gcnum += 0x200;
+
+	return g_dnl_get_board_bcd_device_number(gcnum);
+}
+
 static int g_dnl_bind(struct usb_composite_dev *cdev)
 {
 	struct usb_gadget *gadget = cdev->gadget;
@@ -181,11 +198,9 @@ static int g_dnl_bind(struct usb_composite_dev *cdev)
 	if (ret)
 		goto error;
 
-	gcnum = usb_gadget_controller_number(gadget);
-
-	debug("gcnum: %d\n", gcnum);
+	gcnum = g_dnl_get_bcd_device_number(cdev);
 	if (gcnum >= 0)
-		device_desc.bcdDevice = cpu_to_le16(0x0200 + gcnum);
+		device_desc.bcdDevice = cpu_to_le16(gcnum);
 	else {
 		debug("%s: controller '%s' not recognized\n",
 			shortname, gadget->name);
diff --git a/drivers/usb/gadget/regs-otg.h b/drivers/usb/gadget/regs-otg.h
index 84bfcc5..ac5d112 100644
--- a/drivers/usb/gadget/regs-otg.h
+++ b/drivers/usb/gadget/regs-otg.h
@@ -226,6 +226,11 @@ struct s3c_usbotg_reg {
 #define CLK_SEL_12MHZ                   (0x2 << 0)
 #define CLK_SEL_48MHZ                   (0x0 << 0)
 
+#define EXYNOS4X12_ID_PULLUP0		(0x01 << 3)
+#define EXYNOS4X12_COMMON_ON_N0	(0x01 << 4)
+#define EXYNOS4X12_CLK_SEL_12MHZ	(0x02 << 0)
+#define EXYNOS4X12_CLK_SEL_24MHZ	(0x05 << 0)
+
 /* Device Configuration Register DCFG */
 #define DEV_SPEED_HIGH_SPEED_20         (0x0 << 0)
 #define DEV_SPEED_FULL_SPEED_20         (0x1 << 0)
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c
index 7e20209..ba17a04 100644
--- a/drivers/usb/gadget/s3c_udc_otg.c
+++ b/drivers/usb/gadget/s3c_udc_otg.c
@@ -167,8 +167,13 @@ void otg_phy_init(struct s3c_udc *dev)
 		writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN)
 			&~FORCE_SUSPEND_0), &phy->phypwr);
 
-	writel((readl(&phy->phyclk) &~(ID_PULLUP0 | COMMON_ON_N0)) |
-	       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
+	if (s5p_cpu_id == 0x4412)
+		writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 |
+			EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ,
+		       &phy->phyclk); /* PLL 24Mhz */
+	else
+		writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) |
+		       CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */
 
 	writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST))
 	       | PHY_SW_RST0, &phy->rstcon);
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index c4ce487..1b215c2 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -28,21 +28,48 @@ static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE;
 
 static int omap_uhh_reset(void)
 {
-/*
- * Soft resetting the UHH module causes instability issues on
- * all OMAPs so we just avoid it.
- *
- * See OMAP36xx Errata
- *  i571: USB host EHCI may stall when entering smart-standby mode
- *  i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
- *
- * On OMAP4/5, soft-resetting the UHH module will put it into
- * Smart-Idle mode and lead to a deadlock.
- *
- * On OMAP3, this doesn't seem to be the case but still instabilities
- * are observed on beagle (3530 ES1.0) if soft-reset is used.
- * e.g. NFS root failures with Linux kernel.
- */
+	int timeout = 0;
+	u32 rev;
+
+	rev = readl(&uhh->rev);
+
+	/* Soft RESET */
+	writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc);
+
+	switch (rev) {
+	case OMAP_USBHS_REV1:
+		/* Wait for soft RESET to complete */
+		while (!(readl(&uhh->syss) & 0x1)) {
+			if (timeout > 100) {
+				printf("%s: RESET timeout\n", __func__);
+				return -1;
+			}
+			udelay(10);
+			timeout++;
+		}
+
+		/* Set No-Idle, No-Standby */
+		writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc);
+		break;
+
+	default:	/* Rev. 2 onwards */
+
+		udelay(2); /* Need to wait before accessing SYSCONFIG back */
+
+		/* Wait for soft RESET to complete */
+		while ((readl(&uhh->sysc) & 0x1)) {
+			if (timeout > 100) {
+				printf("%s: RESET timeout\n", __func__);
+				return -1;
+			}
+			udelay(10);
+			timeout++;
+		}
+
+		writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc);
+		break;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/video/bus_vcxk.c b/drivers/video/bus_vcxk.c
index 0138bca..60a5cc5 100644
--- a/drivers/video/bus_vcxk.c
+++ b/drivers/video/bus_vcxk.c
@@ -20,7 +20,6 @@ vu_long  *vcxk_bws_long = ((vu_long *) (CONFIG_SYS_VCXK_BASE));
 	#ifndef VCBITMASK
 		#define VCBITMASK(bitno)	(0x0001 << (bitno % 16))
 	#endif
-#ifndef CONFIG_AT91_LEGACY
 at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
 #define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \
 	do { \
@@ -37,20 +36,6 @@ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
 #define VCXK_ACKNOWLEDGE	\
 	(!(readl(&pio->CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT.pdsr) & \
 			CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN))
-#else
-	#define VCXK_INIT_PIN(PORT, PIN, DDR, I0O1) \
-		((AT91PS_PIO) PORT)->PIO_PER = PIN; \
-		((AT91PS_PIO) PORT)->DDR = PIN; \
-		((AT91PS_PIO) PORT)->PIO_MDDR = PIN; \
-		if (!I0O1) ((AT91PS_PIO) PORT)->PIO_PPUER = PIN;
-
-	#define VCXK_SET_PIN(PORT, PIN)	((AT91PS_PIO) PORT)->PIO_SODR  = PIN;
-	#define VCXK_CLR_PIN(PORT, PIN)	((AT91PS_PIO) PORT)->PIO_CODR  = PIN;
-
-	#define VCXK_ACKNOWLEDGE	\
-		(!(((AT91PS_PIO) CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT)->\
-			PIO_PDSR & CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN))
-#endif
 #elif defined(CONFIG_MCF52x2)
 	#include <asm/m5282.h>
 	#ifndef VCBITMASK