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author | Allen Xu <b45815@freescale.com> | 2014-12-16 20:30:08 -0600 |
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committer | Allen Xu <b45815@freescale.com> | 2014-12-16 22:36:20 -0600 |
commit | 9045626dbc7798cc340f64699bc9bd35c537498a (patch) | |
tree | be2e411a897b8232c2c2e3b84f66b709f1d7c7ed /drivers | |
parent | bbf8af8909842d6e9f6c2175eade998faf58a0d6 (diff) | |
download | u-boot-imx-9045626dbc7798cc340f64699bc9bd35c537498a.zip u-boot-imx-9045626dbc7798cc340f64699bc9bd35c537498a.tar.gz u-boot-imx-9045626dbc7798cc340f64699bc9bd35c537498a.tar.bz2 |
MLK-10035-2: supports NAND chips with oob size up to 744 byte
Update the u-boot code to support NAND chips with oob size up to 744
byte.
For the NAND flash MT29F32G08CBADA, which consists of 2 planes x 1064
blocks per plane. Obviously the block number is not power-of-2. But all
MTD driver assumes the page per block and block per plane must be a
power of 2 number. So the last 40 blocks in each plane must be
truncated.
Signed-off-by: Allen Xu <b45815@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mtd/nand/mxs_nand.c | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c index 9479e11..8ef9b07 100644 --- a/drivers/mtd/nand/mxs_nand.c +++ b/drivers/mtd/nand/mxs_nand.c @@ -41,6 +41,9 @@ #define MXS_NAND_BCH_TIMEOUT 10000 +int chunk_data_chunk_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE; +int galois_field = 13; + struct mxs_nand_info { int cur_chip; @@ -130,12 +133,12 @@ static void mxs_nand_return_dma_descs(struct mxs_nand_info *info) static uint32_t mxs_nand_ecc_chunk_cnt(uint32_t page_data_size) { - return page_data_size / MXS_NAND_CHUNK_DATA_CHUNK_SIZE; + return page_data_size / chunk_data_chunk_size; } static uint32_t mxs_nand_ecc_size_in_bits(uint32_t ecc_strength) { - return ecc_strength * 13; + return ecc_strength * galois_field; } static uint32_t mxs_nand_aux_status_offset(void) @@ -149,7 +152,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size, int ecc_strength; ecc_strength = ((page_oob_size - MXS_NAND_METADATA_SIZE) * 8) - / (13 * mxs_nand_ecc_chunk_cnt(page_data_size)); + /(galois_field * mxs_nand_ecc_chunk_cnt(page_data_size)); /* We need the minor even number. */ ecc_strength -= ecc_strength & 1; @@ -166,7 +169,7 @@ static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size, uint32_t block_mark_chunk_bit_offset; uint32_t block_mark_bit_offset; - chunk_data_size_in_bits = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 8; + chunk_data_size_in_bits = chunk_data_chunk_size * 8; chunk_ecc_size_in_bits = mxs_nand_ecc_size_in_bits(ecc_strength); chunk_total_size_in_bits = @@ -966,9 +969,8 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd) uint32_t tmp; if (mtd->oobsize > MXS_NAND_CHUNK_DATA_CHUNK_SIZE) { - printf("we do not support the NAND whose OOB size is" - "larger then 512 bytes!\n"); - return -EINVAL; + chunk_data_chunk_size = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 2; + galois_field = 14; } /* Configure BCH and set NFC geometry */ @@ -980,16 +982,20 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd) tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET; tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) << BCH_FLASHLAYOUT0_ECC0_OFFSET; - tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE + tmp |= chunk_data_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; + tmp |= (14 == galois_field ? 1 : 0) + << BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET; writel(tmp, &bch_regs->hw_bch_flash0layout0); tmp = (mtd->writesize + mtd->oobsize) << BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET; tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) << BCH_FLASHLAYOUT1_ECCN_OFFSET; - tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE + tmp |= chunk_data_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; + tmp |= (14 == galois_field ? 1 : 0) + << BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET; writel(tmp, &bch_regs->hw_bch_flash0layout1); /* Set *all* chip selects to use layout 0 */ |