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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-09-28 07:09:03 +0000
committerTom Rini <trini@ti.com>2012-10-15 11:54:11 -0700
commit414e1660c8e898539411d92fbacdefc3e6bfbdfb (patch)
treec35c3c7ff2cc058ad105978707be0a1b089b8195 /drivers
parent248cdf0b5270651ca5eefb1aff4a338df6a1ca25 (diff)
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mx51: Fix USB PHY clocks
The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks have different clock gate control bit-fields. The existing code was correct only for i.MX53, so this patch fixes the i.MX51 use case. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Jana Rapava <fermata7@gmail.com> Cc: Wolfgang Grandegger <wg@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/host/ehci-mx5.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 9c34773..9a2c295 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -220,7 +220,8 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
set_usboh3_clk();
enable_usboh3_clk(1);
- set_usb_phy2_clk();
+ set_usb_phy_clk();
+ enable_usb_phy1_clk(1);
enable_usb_phy2_clk(1);
mdelay(1);