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authorNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>2008-08-28 13:40:44 +0900
committerBen Warren <biggerbadderben@gmail.com>2008-09-02 21:18:19 -0700
commit33314470ab32a3f5412bb61b5f3d6c216c88bf9b (patch)
tree8f82839762993ce35c28079f8908d5f385c18d4d /drivers
parent10efa024b8ffd9e6aaca63da8bddfdffdc672274 (diff)
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net: smc911x: Add pkt_data_pull and pkt_data_push function
The RSK7203 board has the SMSC9118 wired up 'incorrectly'. Byte-swapping is necessary, and so poor performance is inevitable. This problem cannot evade by the swap function of CHIP, this can evade by software Byte-swapping. And this has problem by FIFO access only. pkt_data_pull/pkt_data_push functions necessary to solve this problem. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/smc911x.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 0fff820..648c94c 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -57,6 +57,11 @@ static inline void reg_write(u32 addr, u32 val)
#error "SMC911X: undefined bus width"
#endif /* CONFIG_DRIVER_SMC911X_16_BIT */
+u32 pkt_data_pull(u32 addr) \
+ __attribute__ ((weak, alias ("reg_read")));
+void pkt_data_push(u32 addr, u32 val) \
+ __attribute__ ((weak, alias ("reg_write")));
+
#define mdelay(n) udelay((n)*1000)
/* Below are the register offsets and bit definitions
@@ -641,7 +646,7 @@ int eth_send(volatile void *packet, int length)
tmplen = (length + 3) / 4;
while (tmplen--)
- reg_write(TX_DATA_FIFO, *data++);
+ pkt_data_push(TX_DATA_FIFO, *data++);
/* wait for transmission */
while (!((reg_read(TX_FIFO_INF) & TX_FIFO_INF_TSUSED) >> 16));
@@ -684,7 +689,7 @@ int eth_rx(void)
tmplen = (pktlen + 2+ 3) / 4;
while (tmplen--)
- *data++ = reg_read(RX_DATA_FIFO);
+ *data++ = pkt_data_pull(RX_DATA_FIFO);
if (status & RX_STS_ES)
printf(DRIVERNAME