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| author | Wolfgang Denk <wd@denx.de> | 2010-09-09 19:55:02 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-09-09 19:55:02 +0200 |
| commit | a78ded13111dde555ed5de99cff10f41ae674cb1 (patch) | |
| tree | 0bd1a8edd5e6e5d73d945e1f9d938b82f7b0194d /drivers | |
| parent | f8736c2125f5bbbe7507e59c7b2c44ec17196aa3 (diff) | |
| parent | 6696ac19adb160b86aaccc38d1d6818606a44f97 (diff) | |
| download | u-boot-imx-a78ded13111dde555ed5de99cff10f41ae674cb1.zip u-boot-imx-a78ded13111dde555ed5de99cff10f41ae674cb1.tar.gz u-boot-imx-a78ded13111dde555ed5de99cff10f41ae674cb1.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 9 | ||||
| -rw-r--r-- | drivers/power/twl4030.c | 69 |
2 files changed, 36 insertions, 42 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ed1c9c9..7d17846 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2653,9 +2653,12 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, } if (!type) { - printk(KERN_INFO "%s: unknown NAND device: Manufacturer ID:" - " 0x%02x, Chip ID: 0x%02x\n", __func__, - *maf_id, dev_id); + /* supress warning if there is no nand */ + if (*maf_id != 0x00 && *maf_id != 0xff && + dev_id != 0x00 && dev_id != 0xff) + printk(KERN_INFO "%s: unknown NAND device: " + "Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", + __func__, *maf_id, dev_id); return ERR_PTR(-ENODEV); } diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index eb066cb..1a54089 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -59,57 +59,48 @@ void twl4030_power_reset_init(void) } } - /* - * Power Init + * Set Device Group and Voltage */ -#define DEV_GRP_P1 0x20 -#define VAUX3_VSEL_28 0x03 -#define DEV_GRP_ALL 0xE0 -#define VPLL2_VSEL_18 0x05 -#define VDAC_VSEL_18 0x03 +void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, + u8 dev_grp, u8 dev_grp_sel) +{ + /* Select the Device Group */ + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, dev_grp_sel, + dev_grp); + + /* Select the Voltage */ + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, vsel_val, + vsel_reg); +} void twl4030_power_init(void) { - unsigned char byte; - /* set VAUX3 to 2.8V */ - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VAUX3_DEV_GRP); - byte = VAUX3_VSEL_28; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VAUX3_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX3_DEDICATED, + TWL4030_PM_RECEIVER_VAUX3_VSEL_28, + TWL4030_PM_RECEIVER_VAUX3_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); /* set VPLL2 to 1.8V */ - byte = DEV_GRP_ALL; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VPLL2_DEV_GRP); - byte = VPLL2_VSEL_18; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VPLL2_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VPLL2_DEDICATED, + TWL4030_PM_RECEIVER_VPLL2_VSEL_18, + TWL4030_PM_RECEIVER_VPLL2_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_ALL); /* set VDAC to 1.8V */ - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VDAC_DEV_GRP); - byte = VDAC_VSEL_18; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VDAC_DEDICATED); + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VDAC_DEDICATED, + TWL4030_PM_RECEIVER_VDAC_VSEL_18, + TWL4030_PM_RECEIVER_VDAC_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); } -#define VMMC1_VSEL_30 0x02 - void twl4030_power_mmc_init(void) { - unsigned char byte; - - byte = DEV_GRP_P1; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VMMC1_DEV_GRP); - - /* 3 Volts */ - byte = VMMC1_VSEL_30; - twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, - TWL4030_PM_RECEIVER_VMMC1_DEDICATED); + /* Set VMMC1 to 3 Volts */ + twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VMMC1_DEDICATED, + TWL4030_PM_RECEIVER_VMMC1_VSEL_30, + TWL4030_PM_RECEIVER_VMMC1_DEV_GRP, + TWL4030_PM_RECEIVER_DEV_GRP_P1); } + |