diff options
author | Wolfgang Denk <wd@denx.de> | 2011-08-04 23:05:07 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-08-04 23:05:07 +0200 |
commit | fb6440ee9b110b759ef61fd80bbd0df1bbf0f37b (patch) | |
tree | dbde38784fb8b48c7f9b14e70a947fab3a1f3bab /drivers | |
parent | 01b0f50060923e89693bf155c677e4f665916b3f (diff) | |
parent | b608b95753873a5073f550cca002c4bebf1a18f5 (diff) | |
download | u-boot-imx-fb6440ee9b110b759ef61fd80bbd0df1bbf0f37b.zip u-boot-imx-fb6440ee9b110b759ef61fd80bbd0df1bbf0f37b.tar.gz u-boot-imx-fb6440ee9b110b759ef61fd80bbd0df1bbf0f37b.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
drivers/rtc: add Marvell Integrated RTC
Armada100: Add Board Support for Marvell GuruPlug-Display
Armada100: MFP macro naming correction
arm: auto gen asm-offsets.h for mb86r0x
spear: fix build errors for spear3xx/spear600 platforms
cosmetic: arm: lib/board.c: Coding Style cleanup
ARM: versatile: fix board support
SMDKV310: Enable device tree support
SMDKV310: MMC_SPL: Fix building when using "make O="
arm: a320: enable tagged list support
arm: a320: fix multiline comment style
ARMv7: u8500_href: Add missing header to fix compiler warning
Removed unused define, CONFIG_ARMV7.
avr32: add grasshopper (ICnova AP7000) board
AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings
MAKEALL: remove AT91 boards that are in boards.cfg
AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
AT91: Board fix for AT91SAM9261-EK
AT91: SoC fix at91sam9261_matrix.h
AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master
AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
AT91: change common at91sam9261 files to compile with new scheme
AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
README: fix arm920t/at91 path
net/eth.c: drop obsolete at91rm9200 support
README.at91-soc: remove AT91(RM9200) joining notice
a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
MAKEALL: remove obsolete at91rm9200 soc
ARM: remove obsolete at91rm9200
omap4: clock init support for omap4460
omap4: support TPS programming
omap: reuse omap3 gpio support in omap4
omap4: sdram init changes for omap4460
omap4: add omap4460 revision detection
mkimage: Add OMAP boot image support
omap: add MMC and FAT support to SPL
omap: add basic SPL support
armv7: start.S: fixes and enhancements for SPL
omap4: automatic sdram detection
omap4: calculate EMIF register values
omap4: add sdram init support
omap4: add clock support
omap4: add OMAP4430 revision check
omap4: cleanup pin mux data
omap4: utility function to identify the context of hw init
DA8xx: fix LPSC constants
DA8xx: switch an enum to defines for consistency
DA8xx: add MMC/SD controller addresses
DaVinci EMAC: declare function for all DA8xx CPUs
DA8xx: add generic GPIO driver
DaVinci: rename gpio_defs.h to gpio.h
omap3evm: eth: Include functions only when necessary
omap3evm: Update ethernet reset sequence for Rev.G board
omap3evm: eth: split function setup_net_chip
omap3: Include array definition only when it is used
omap730p2: fix build breaks
omap2420h4: fix build breaks
omap1610inn: fix build breaks
omap1510inn: fix build breaks
omap5912osk: fix build breaks
omap1610h2: fix build breaks
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpio/da8xx_gpio.c | 281 | ||||
-rw-r--r-- | drivers/rtc/Makefile | 1 | ||||
-rw-r--r-- | drivers/rtc/mvrtc.c | 124 | ||||
-rw-r--r-- | drivers/rtc/mvrtc.h | 65 | ||||
-rw-r--r-- | drivers/spi/atmel_dataflash_spi.c | 16 | ||||
-rw-r--r-- | drivers/usb/musb/da8xx.h | 2 |
7 files changed, 486 insertions, 4 deletions
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 1e3ae11..62ec97d 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o +COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c new file mode 100644 index 0000000..0308223 --- /dev/null +++ b/drivers/gpio/da8xx_gpio.c @@ -0,0 +1,281 @@ +/* + * GPIO driver for TI DaVinci DA8xx SOCs. + * + * (C) Copyright 2011 Guralp Systems Ltd. + * Laurence Withers <lwithers@guralp.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> +#include <asm/arch/davinci_misc.h> + + +static struct gpio_registry { + int is_registered; + char name[GPIO_NAME_SIZE]; +} gpio_registry[MAX_NUM_GPIOS]; + + +#define pinmux(x) (&davinci_syscfg_regs->pinmux[x]) + +static const struct pinmux_config gpio_pinmux[] = { + { pinmux(1), 8, 7 }, /* GP0[0] */ + { pinmux(1), 8, 6 }, + { pinmux(1), 8, 5 }, + { pinmux(1), 8, 4 }, + { pinmux(1), 8, 3 }, + { pinmux(1), 8, 2 }, + { pinmux(1), 8, 1 }, + { pinmux(1), 8, 0 }, + { pinmux(0), 8, 7 }, + { pinmux(0), 8, 6 }, + { pinmux(0), 8, 5 }, + { pinmux(0), 8, 4 }, + { pinmux(0), 8, 3 }, + { pinmux(0), 8, 2 }, + { pinmux(0), 8, 1 }, + { pinmux(0), 8, 0 }, + { pinmux(4), 8, 7 }, /* GP1[0] */ + { pinmux(4), 8, 6 }, + { pinmux(4), 8, 5 }, + { pinmux(4), 8, 4 }, + { pinmux(4), 8, 3 }, + { pinmux(4), 8, 2 }, + { pinmux(4), 4, 1 }, + { pinmux(4), 4, 0 }, + { pinmux(3), 4, 0 }, + { pinmux(2), 4, 6 }, + { pinmux(2), 4, 5 }, + { pinmux(2), 4, 4 }, + { pinmux(2), 4, 3 }, + { pinmux(2), 4, 2 }, + { pinmux(2), 4, 1 }, + { pinmux(2), 8, 0 }, + { pinmux(6), 8, 7 }, /* GP2[0] */ + { pinmux(6), 8, 6 }, + { pinmux(6), 8, 5 }, + { pinmux(6), 8, 4 }, + { pinmux(6), 8, 3 }, + { pinmux(6), 8, 2 }, + { pinmux(6), 8, 1 }, + { pinmux(6), 8, 0 }, + { pinmux(5), 8, 7 }, + { pinmux(5), 8, 6 }, + { pinmux(5), 8, 5 }, + { pinmux(5), 8, 4 }, + { pinmux(5), 8, 3 }, + { pinmux(5), 8, 2 }, + { pinmux(5), 8, 1 }, + { pinmux(5), 8, 0 }, + { pinmux(8), 8, 7 }, /* GP3[0] */ + { pinmux(8), 8, 6 }, + { pinmux(8), 8, 5 }, + { pinmux(8), 8, 4 }, + { pinmux(8), 8, 3 }, + { pinmux(8), 8, 2 }, + { pinmux(8), 8, 1 }, + { pinmux(8), 8, 0 }, + { pinmux(7), 8, 7 }, + { pinmux(7), 8, 6 }, + { pinmux(7), 8, 5 }, + { pinmux(7), 8, 4 }, + { pinmux(7), 8, 3 }, + { pinmux(7), 8, 2 }, + { pinmux(7), 8, 1 }, + { pinmux(7), 8, 0 }, + { pinmux(10), 8, 7 }, /* GP4[0] */ + { pinmux(10), 8, 6 }, + { pinmux(10), 8, 5 }, + { pinmux(10), 8, 4 }, + { pinmux(10), 8, 3 }, + { pinmux(10), 8, 2 }, + { pinmux(10), 8, 1 }, + { pinmux(10), 8, 0 }, + { pinmux(9), 8, 7 }, + { pinmux(9), 8, 6 }, + { pinmux(9), 8, 5 }, + { pinmux(9), 8, 4 }, + { pinmux(9), 8, 3 }, + { pinmux(9), 8, 2 }, + { pinmux(9), 8, 1 }, + { pinmux(9), 8, 0 }, + { pinmux(12), 8, 7 }, /* GP5[0] */ + { pinmux(12), 8, 6 }, + { pinmux(12), 8, 5 }, + { pinmux(12), 8, 4 }, + { pinmux(12), 8, 3 }, + { pinmux(12), 8, 2 }, + { pinmux(12), 8, 1 }, + { pinmux(12), 8, 0 }, + { pinmux(11), 8, 7 }, + { pinmux(11), 8, 6 }, + { pinmux(11), 8, 5 }, + { pinmux(11), 8, 4 }, + { pinmux(11), 8, 3 }, + { pinmux(11), 8, 2 }, + { pinmux(11), 8, 1 }, + { pinmux(11), 8, 0 }, + { pinmux(19), 8, 6 }, /* GP6[0] */ + { pinmux(19), 8, 5 }, + { pinmux(19), 8, 4 }, + { pinmux(19), 8, 3 }, + { pinmux(19), 8, 2 }, + { pinmux(16), 8, 1 }, + { pinmux(14), 8, 1 }, + { pinmux(14), 8, 0 }, + { pinmux(13), 8, 7 }, + { pinmux(13), 8, 6 }, + { pinmux(13), 8, 5 }, + { pinmux(13), 8, 4 }, + { pinmux(13), 8, 3 }, + { pinmux(13), 8, 2 }, + { pinmux(13), 8, 1 }, + { pinmux(13), 8, 0 }, + { pinmux(18), 8, 1 }, /* GP7[0] */ + { pinmux(18), 8, 0 }, + { pinmux(17), 8, 7 }, + { pinmux(17), 8, 6 }, + { pinmux(17), 8, 5 }, + { pinmux(17), 8, 4 }, + { pinmux(17), 8, 3 }, + { pinmux(17), 8, 2 }, + { pinmux(17), 8, 1 }, + { pinmux(17), 8, 0 }, + { pinmux(16), 8, 7 }, + { pinmux(16), 8, 6 }, + { pinmux(16), 8, 5 }, + { pinmux(16), 8, 4 }, + { pinmux(16), 8, 3 }, + { pinmux(16), 8, 2 }, + { pinmux(19), 8, 0 }, /* GP8[0] */ + { pinmux(3), 4, 7 }, + { pinmux(3), 4, 6 }, + { pinmux(3), 4, 5 }, + { pinmux(3), 4, 4 }, + { pinmux(3), 4, 3 }, + { pinmux(3), 4, 2 }, + { pinmux(2), 4, 7 }, + { pinmux(19), 8, 1 }, + { pinmux(19), 8, 0 }, + { pinmux(18), 8, 7 }, + { pinmux(18), 8, 6 }, + { pinmux(18), 8, 5 }, + { pinmux(18), 8, 4 }, + { pinmux(18), 8, 3 }, + { pinmux(18), 8, 2 }, +}; + + + +int gpio_request(int gp, const char *label) +{ + if (gp >= MAX_NUM_GPIOS) + return -1; + + if (gpio_registry[gp].is_registered) + return -1; + + gpio_registry[gp].is_registered = 1; + strncpy(gpio_registry[gp].name, label, GPIO_NAME_SIZE); + gpio_registry[gp].name[GPIO_NAME_SIZE - 1] = 0; + + davinci_configure_pin_mux(&gpio_pinmux[gp], 1); + + return 0; +} + + +void gpio_free(int gp) +{ + gpio_registry[gp].is_registered = 0; +} + + +void gpio_toggle_value(int gp) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + gpio_set_value(gp, !gpio_get_value(gp)); +} + + +int gpio_direction_input(int gp) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + setbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + return 0; +} + + +int gpio_direction_output(int gp, int value) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + clrbits_le32(&bank->dir, 1U << GPIO_BIT(gp)); + gpio_set_value(gp, value); + return 0; +} + + +int gpio_get_value(int gp) +{ + struct davinci_gpio *bank; + unsigned int ip; + + bank = GPIO_BANK(gp); + ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gp)); + return ip ? 1 : 0; +} + + +void gpio_set_value(int gp, int value) +{ + struct davinci_gpio *bank; + + bank = GPIO_BANK(gp); + + if (value) + bank->set_data = 1U << GPIO_BIT(gp); + else + bank->clr_data = 1U << GPIO_BIT(gp); +} + + +void gpio_info(void) +{ + int gp, dir, val; + struct davinci_gpio *bank; + + for (gp = 0; gp < MAX_NUM_GPIOS; ++gp) { + bank = GPIO_BANK(gp); + dir = in_le32(&bank->dir) & (1U << GPIO_BIT(gp)); + val = gpio_get_value(gp); + + printf("% 4d: %s: %d [%c] %s\n", + gp, dir ? " in" : "out", val, + gpio_registry[gp].is_registered ? 'x' : ' ', + gpio_registry[gp].name); + } +} diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index e4be4a4..ca27745 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -55,6 +55,7 @@ COBJS-$(CONFIG_MCFRTC) += mcfrtc.o COBJS-$(CONFIG_RTC_MK48T59) += mk48t59.o COBJS-$(CONFIG_RTC_MPC5200) += mpc5xxx.o COBJS-$(CONFIG_RTC_MPC8xx) += mpc8xx.o +COBJS-$(CONFIG_RTC_MV) += mvrtc.o COBJS-$(CONFIG_RTC_PCF8563) += pcf8563.o COBJS-$(CONFIG_RTC_PL031) += pl031.o COBJS-$(CONFIG_RTC_PT7C4338) += pt7c4338.o diff --git a/drivers/rtc/mvrtc.c b/drivers/rtc/mvrtc.c new file mode 100644 index 0000000..ccc573a --- /dev/null +++ b/drivers/rtc/mvrtc.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2011 + * Jason Cooper <u-boot@lakedaemon.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Date & Time support for Marvell Integrated RTC + */ + +#include <common.h> +#include <command.h> +#include <rtc.h> +#include "mvrtc.h" + +/* This RTC does not support century, so we assume 20 */ +#define CENTURY 20 + +int rtc_get(struct rtc_time *t) +{ + u32 time; + u32 date; + struct mvrtc_registers *mvrtc_regs; + + mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; + + /* read the time register */ + time = readl(&mvrtc_regs->time); + + /* read the date register */ + date = readl(&mvrtc_regs->date); + + /* test for 12 hour clock (can't tell if it's am/pm) */ + if (time & MVRTC_HRFMT_MSK) { + printf("Error: RTC in 12 hour mode, can't determine AM/PM.\n"); + return -1; + } + + /* time */ + t->tm_sec = bcd2bin((time >> MVRTC_SEC_SFT) & MVRTC_SEC_MSK); + t->tm_min = bcd2bin((time >> MVRTC_MIN_SFT) & MVRTC_MIN_MSK); + t->tm_hour = bcd2bin((time >> MVRTC_HOUR_SFT) & MVRTC_HOUR_MSK); + t->tm_wday = bcd2bin((time >> MVRTC_DAY_SFT) & MVRTC_DAY_MSK); + t->tm_wday--; + + /* date */ + t->tm_mday = bcd2bin((date >> MVRTC_DATE_SFT) & MVRTC_DATE_MSK); + t->tm_mon = bcd2bin((date >> MVRTC_MON_SFT) & MVRTC_MON_MSK); + t->tm_year = bcd2bin((date >> MVRTC_YEAR_SFT) & MVRTC_YEAR_MSK); + t->tm_year += CENTURY * 100; + + /* not supported in this RTC */ + t->tm_yday = 0; + t->tm_isdst = 0; + + return 0; +} + +int rtc_set(struct rtc_time *t) +{ + u32 time = 0; /* sets hour format bit to zero, 24hr format. */ + u32 date = 0; + struct mvrtc_registers *mvrtc_regs; + + mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; + + /* check that this code isn't 80+ years old ;-) */ + if ((t->tm_year / 100) != CENTURY) + printf("Warning: Only century %d supported.\n", CENTURY); + + /* time */ + time |= (bin2bcd(t->tm_sec) & MVRTC_SEC_MSK) << MVRTC_SEC_SFT; + time |= (bin2bcd(t->tm_min) & MVRTC_MIN_MSK) << MVRTC_MIN_SFT; + time |= (bin2bcd(t->tm_hour) & MVRTC_HOUR_MSK) << MVRTC_HOUR_SFT; + time |= (bin2bcd(t->tm_wday + 1) & MVRTC_DAY_MSK) << MVRTC_DAY_SFT; + + /* date */ + date |= (bin2bcd(t->tm_mday) & MVRTC_DATE_MSK) << MVRTC_DATE_SFT; + date |= (bin2bcd(t->tm_mon) & MVRTC_MON_MSK) << MVRTC_MON_SFT; + date |= (bin2bcd(t->tm_year % 100) & MVRTC_YEAR_MSK) << MVRTC_YEAR_SFT; + + /* write the time register */ + writel(time, &mvrtc_regs->time); + + /* write the date register */ + writel(date, &mvrtc_regs->date); + + return 0; +} + +void rtc_reset(void) +{ + u32 time; + u32 sec; + struct mvrtc_registers *mvrtc_regs; + + mvrtc_regs = (struct mvrtc_registers *)KW_RTC_BASE; + + /* no init routine for this RTC needed, just check that it's working */ + time = readl(&mvrtc_regs->time); + sec = bcd2bin((time >> MVRTC_SEC_SFT) & MVRTC_SEC_MSK); + udelay(1000000); + time = readl(&mvrtc_regs->time); + + if (sec == bcd2bin((time >> MVRTC_SEC_SFT) & MVRTC_SEC_MSK)) + printf("Error: RTC did not increment.\n"); +} diff --git a/drivers/rtc/mvrtc.h b/drivers/rtc/mvrtc.h new file mode 100644 index 0000000..b9d5c6f --- /dev/null +++ b/drivers/rtc/mvrtc.h @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2011 + * Jason Cooper <u-boot@lakedaemon.net> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Date & Time support for Marvell Integrated RTC + */ + +#ifndef _MVRTC_H_ +#define _MVRTC_H_ + +#include <asm/arch/kirkwood.h> +#include <compiler.h> + +/* RTC registers */ +struct mvrtc_registers { + u32 time; + u32 date; +}; + +/* time register */ +#define MVRTC_SEC_SFT 0 +#define MVRTC_SEC_MSK 0x7f +#define MVRTC_MIN_SFT 8 +#define MVRTC_MIN_MSK 0x7f +#define MVRTC_HOUR_SFT 16 +#define MVRTC_HOUR_MSK 0x3f +#define MVRTC_DAY_SFT 24 +#define MVRTC_DAY_MSK 0x7 + +/* + * Hour format bit + * 1 = 12 hour clock + * 0 = 24 hour clock + */ +#define MVRTC_HRFMT_MSK 0x00400000 + +/* date register */ +#define MVRTC_DATE_SFT 0 +#define MVRTC_DATE_MSK 0x3f +#define MVRTC_MON_SFT 8 +#define MVRTC_MON_MSK 0x1f +#define MVRTC_YEAR_SFT 16 +#define MVRTC_YEAR_MSK 0xff + +#endif diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c index e7d3ff0..363e07a 100644 --- a/drivers/spi/atmel_dataflash_spi.c +++ b/drivers/spi/atmel_dataflash_spi.c @@ -19,10 +19,20 @@ * */ +/* + * This driver desperately needs rework: + * + * - use structure SoC access + * - get rid of including asm/arch/at91_spi.h + * - remove asm/arch/at91_spi.h + * - get rid of all CONFIG_ATMEL_LEGACY defines and uses + * + * 02-Aug-2010 Reinhard Meyer <uboot@emk-elektronik.de> + */ + #include <common.h> -#ifndef CONFIG_AT91_LEGACY -# define CONFIG_AT91_LEGACY -# warning Please update to use C structure SoC access ! +#ifndef CONFIG_ATMEL_LEGACY +# define CONFIG_ATMEL_LEGACY #endif #include <spi.h> #include <malloc.h> diff --git a/drivers/usb/musb/da8xx.h b/drivers/usb/musb/da8xx.h index b9660ba..be1cdaf 100644 --- a/drivers/usb/musb/da8xx.h +++ b/drivers/usb/musb/da8xx.h @@ -25,7 +25,7 @@ #define __DA8XX_MUSB_H__ #include <asm/arch/hardware.h> -#include <asm/arch/gpio_defs.h> +#include <asm/arch/gpio.h> #include "musb_core.h" /* Base address of da8xx usb0 wrapper */ |