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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-10-26 07:00:28 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-10-26 07:00:28 +0200
commitc68436fa427a69ea308d74c410067507d6c7103b (patch)
tree4f05a23bb3eabfe1eaf1f92bf6f57a6e403ac9a4 /drivers
parent186fc4db263fc6332d6712be99a9a387087d29c7 (diff)
parentc7d35bef255dedb3ec3856982f042dde514676b0 (diff)
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Merge remote-tracking branch 'u-boot-ti/master'
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/omap3_spi.c11
-rw-r--r--drivers/usb/musb/musb_udc.c11
2 files changed, 15 insertions, 7 deletions
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index e40a632..6791a7e 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -173,14 +173,13 @@ int spi_claim_bus(struct spi_slave *slave)
/* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS
* REVISIT: this controller could support SPI_3WIRE mode.
*/
-#ifdef CONFIG_AM33XX
+#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED
/*
- * The reference design on AM33xx has D0 and D1 wired up opposite
- * of how it has been done on previous platforms. We assume that
- * custom hardware will also follow this convention.
+ * Some boards have D0 wired as MOSI / D1 as MISO instead of
+ * The normal D0 as MISO / D1 as MOSI.
*/
- conf &= OMAP3_MCSPI_CHCONF_DPE0;
- conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
+ conf &= ~OMAP3_MCSPI_CHCONF_DPE0;
+ conf |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1;
#else
conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1);
conf |= OMAP3_MCSPI_CHCONF_DPE0;
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 09cdec3..e0b4217 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -640,8 +640,17 @@ static void musb_peri_ep0(void)
static void musb_peri_rx_ep(unsigned int ep)
{
- u16 peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
+ u16 peri_rxcount;
+ u8 peri_rxcsr = readw(&musbr->ep[ep].epN.rxcsr);
+ if (!(peri_rxcsr & MUSB_RXCSR_RXPKTRDY)) {
+ if (debug_level > 0)
+ serial_printf("ERROR : %s %d without MUSB_RXCSR_RXPKTRDY set\n",
+ __PRETTY_FUNCTION__, ep);
+ return;
+ }
+
+ peri_rxcount = readw(&musbr->ep[ep].epN.rxcount);
if (peri_rxcount) {
struct usb_endpoint_instance *endpoint;
u32 length;