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| author | Simon Glass <sjg@chromium.org> | 2014-09-04 16:27:36 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-09-10 13:00:02 -0600 |
| commit | 858530a8c0a7ce7e573e513934804a00d6676813 (patch) | |
| tree | 201996c9c4abc135364ffa695c08486a9c940463 /drivers | |
| parent | c369139234c03b1494394d12cd27009f47aa6606 (diff) | |
| download | u-boot-imx-858530a8c0a7ce7e573e513934804a00d6676813.zip u-boot-imx-858530a8c0a7ce7e573e513934804a00d6676813.tar.gz u-boot-imx-858530a8c0a7ce7e573e513934804a00d6676813.tar.bz2 | |
dm: tegra: Enable driver model for serial
Use driver model for serial ports.
Since Tegra now uses driver model for serial, adjust the definition of
V_NS16550_CLK so that it is clear that this is only used for SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/serial/Makefile | 1 | ||||
| -rw-r--r-- | drivers/serial/serial_tegra.c | 38 |
2 files changed, 39 insertions, 0 deletions
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 5ae6416..853a8c6 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o obj-$(CONFIG_MXS_AUART) += mxs_auart.o obj-$(CONFIG_ARC_SERIAL) += serial_arc.o +obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/serial_tegra.c b/drivers/serial/serial_tegra.c new file mode 100644 index 0000000..7eb70e1 --- /dev/null +++ b/drivers/serial/serial_tegra.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <ns16550.h> +#include <serial.h> + +static const struct udevice_id tegra_serial_ids[] = { + { .compatible = "nvidia,tegra20-uart" }, + { } +}; + +static int tegra_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = ns16550_serial_ofdata_to_platdata(dev); + if (ret) + return ret; + plat->clock = V_NS16550_CLK; + + return 0; +} +U_BOOT_DRIVER(serial_ns16550) = { + .name = "serial_tegra20", + .id = UCLASS_SERIAL, + .of_match = tegra_serial_ids, + .ofdata_to_platdata = tegra_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, +}; |