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author | Michal Simek <michal.simek@xilinx.com> | 2013-04-26 13:12:07 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2013-05-06 10:41:19 +0200 |
commit | 52c2064476a2a44a9a872c6f1d69f4444cb49cbd (patch) | |
tree | d46789e4393669ceecfff25ba98f426cdabd7fee /drivers | |
parent | fc598412ced94e01d4bbe8769b2a114ff6ac6f2a (diff) | |
download | u-boot-imx-52c2064476a2a44a9a872c6f1d69f4444cb49cbd.zip u-boot-imx-52c2064476a2a44a9a872c6f1d69f4444cb49cbd.tar.gz u-boot-imx-52c2064476a2a44a9a872c6f1d69f4444cb49cbd.tar.bz2 |
cmd: fpga: Move fpga_loadbitstream to fpga.c
In bitstream decoding you can directly check device
which you want to load and in fpga.c are fpga_validate
and fpga_dev_info functions which should be used for it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/fpga/fpga.c | 9 | ||||
-rw-r--r-- | drivers/fpga/xilinx.c | 86 |
2 files changed, 95 insertions, 0 deletions
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 43bdf4f..f0253bf 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -188,6 +188,15 @@ int fpga_add(fpga_type devtype, void *desc) } /* + * Convert bitstream data and load into the fpga + */ +int __weak fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size) +{ + printf("Bitstream support not implemented for this FPGA device\n"); + return FPGA_FAIL; +} + +/* * Generic multiplexing code */ int fpga_load(int devnum, const void *buf, size_t bsize) diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index 32787b2..7d0342a 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -48,6 +48,92 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn); /* ------------------------------------------------------------------------- */ +int fpga_loadbitstream(unsigned long dev, char *fpgadata, size_t size) +{ + unsigned int length; + unsigned int swapsize; + char buffer[80]; + unsigned char *dataptr; + unsigned int i; + + dataptr = (unsigned char *)fpgadata; + + /* skip the first bytes of the bitsteam, their meaning is unknown */ + length = (*dataptr << 8) + *(dataptr + 1); + dataptr += 2; + dataptr += length; + + /* get design name (identifier, length, string) */ + length = (*dataptr << 8) + *(dataptr + 1); + dataptr += 2; + if (*dataptr++ != 0x61) { + debug("%s: Design name id not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } + + length = (*dataptr << 8) + *(dataptr + 1); + dataptr += 2; + for (i = 0; i < length; i++) + buffer[i] = *dataptr++; + + printf(" design filename = \"%s\"\n", buffer); + + /* get part number (identifier, length, string) */ + if (*dataptr++ != 0x62) { + printf("%s: Part number id not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } + + length = (*dataptr << 8) + *(dataptr + 1); + dataptr += 2; + for (i = 0; i < length; i++) + buffer[i] = *dataptr++; + printf(" part number = \"%s\"\n", buffer); + + /* get date (identifier, length, string) */ + if (*dataptr++ != 0x63) { + printf("%s: Date identifier not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } + + length = (*dataptr << 8) + *(dataptr+1); + dataptr += 2; + for (i = 0; i < length; i++) + buffer[i] = *dataptr++; + printf(" date = \"%s\"\n", buffer); + + /* get time (identifier, length, string) */ + if (*dataptr++ != 0x64) { + printf("%s: Time identifier not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } + + length = (*dataptr << 8) + *(dataptr+1); + dataptr += 2; + for (i = 0; i < length; i++) + buffer[i] = *dataptr++; + printf(" time = \"%s\"\n", buffer); + + /* get fpga data length (identifier, length) */ + if (*dataptr++ != 0x65) { + printf("%s: Data length id not recognized in bitstream\n", + __func__); + return FPGA_FAIL; + } + swapsize = ((unsigned int) *dataptr << 24) + + ((unsigned int) *(dataptr + 1) << 16) + + ((unsigned int) *(dataptr + 2) << 8) + + ((unsigned int) *(dataptr + 3)); + dataptr += 4; + printf(" bytes in bitstream = %d\n", swapsize); + + return fpga_load(dev, dataptr, swapsize); +} + int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize) { int ret_val = FPGA_FAIL; /* assume a failure */ |