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authorYork Sun <yorksun@freescale.com>2013-03-25 07:39:36 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-14 16:13:25 -0500
commit431047955b7f9addeda0a7c796618c102711247b (patch)
treee98a8d7e5bd94cc49b871efddac86215c5a577dc /drivers
parentef00227551273eb1acca299bcb9528e1a2071328 (diff)
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powerpc/b4860qds: Assign DDR address in board file
B4860QDS requires DDRC2 has 0 as base address and DDRC1 has higher address. This is the requirement for DSP cores to run in 32-bit address space. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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