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| author | Wolfgang Denk <wd@denx.de> | 2007-05-17 00:06:11 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-05-17 00:06:11 +0200 |
| commit | 3a71b5ca775fc9cf506c12d91925019591446c7c (patch) | |
| tree | 0eb875a5ed89145e1d73ce411b8e2705a53132bd /drivers | |
| parent | 3162eb836903c8b247fdc7470dd39bfa6996f495 (diff) | |
| parent | 70124c2602ae2d4c5d3dba05b482d91548242de8 (diff) | |
| download | u-boot-imx-3a71b5ca775fc9cf506c12d91925019591446c7c.zip u-boot-imx-3a71b5ca775fc9cf506c12d91925019591446c7c.tar.gz u-boot-imx-3a71b5ca775fc9cf506c12d91925019591446c7c.tar.bz2 | |
Merge with /home/git/u-boot
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/systemace.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/systemace.c b/drivers/systemace.c index 3848d9c..7d82c27 100644 --- a/drivers/systemace.c +++ b/drivers/systemace.c @@ -211,10 +211,16 @@ static unsigned long systemace_read(int dev, unsigned long start, /* Write sector count | ReadMemCardData. */ ace_writew((trans & 0xff) | 0x0300, 0x14); +/* + * For FPGA configuration via SystemACE is reset unacceptable + * CFGDONE bit in STATUSREG is not set to 1. + */ +#ifndef SYSTEMACE_CONFIG_FPGA /* Reset the configruation controller */ val = ace_readw(0x18); val |= 0x0080; ace_writew(val, 0x18); +#endif retry = trans * 16; while (retry > 0) { |