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| author | Thierry Reding <thierry.reding@gmail.com> | 2013-09-20 16:03:43 +0200 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2013-11-22 17:03:21 -0600 |
| commit | 2287286be4e268d3d4ec3c0347bf31479dbd1f05 (patch) | |
| tree | d10aef27de15aa05e2a1d260dd50b717546adbec /drivers | |
| parent | 22ece0e2e23c5cc5a23a5b8aff3dc75c9832e82f (diff) | |
| download | u-boot-imx-2287286be4e268d3d4ec3c0347bf31479dbd1f05.zip u-boot-imx-2287286be4e268d3d4ec3c0347bf31479dbd1f05.tar.gz u-boot-imx-2287286be4e268d3d4ec3c0347bf31479dbd1f05.tar.bz2 | |
net: rtl8169: Add support for RTL8168d/8111d
This chip is compatible with the existing driver, except that it uses
BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
use the PCIe ethernet interface on the CompuLab Trimslice to boot from
the network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276477
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/rtl8169.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index c47485a..d040ab1 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -246,6 +246,7 @@ static struct { {"RTL-8169sc/8110sc", 0x18, 0xff7e1880,}, {"RTL-8168b/8111sb", 0x30, 0xff7e1880,}, {"RTL-8168b/8111sb", 0x38, 0xff7e1880,}, + {"RTL-8168d/8111d", 0x28, 0xff7e1880,}, {"RTL-8168evl/8111evl", 0x2e, 0xff7e1880,}, {"RTL-8101e", 0x34, 0xff7e1880,}, {"RTL-8100e", 0x32, 0xff7e1880,}, @@ -315,6 +316,7 @@ static const unsigned int rtl8169_rx_config = static struct pci_device_id supported[] = { {PCI_VENDOR_ID_REALTEK, 0x8167}, + {PCI_VENDOR_ID_REALTEK, 0x8168}, {PCI_VENDOR_ID_REALTEK, 0x8169}, {} }; @@ -915,11 +917,25 @@ int rtl8169_initialize(bd_t *bis) int idx=0; while(1){ + unsigned int region; + u16 device; + /* Find RTL8169 */ if ((devno = pci_find_devices(supported, idx++)) < 0) break; - pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); + pci_read_config_word(devno, PCI_DEVICE_ID, &device); + switch (device) { + case 0x8168: + region = 2; + break; + + default: + region = 1; + break; + } + + pci_read_config_dword(devno, PCI_BASE_ADDRESS_0 + (region * 4), &iobase); iobase &= ~0xf; debug ("rtl8169: REALTEK RTL8169 @0x%x\n", iobase); |