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authorAnson Huang <b20788@freescale.com>2011-06-22 12:50:49 +0800
committerFrank Li <Frank.Li@freescale.com>2011-06-24 09:19:01 +0800
commit15f996b62fb5d2709ff66fbca0f6d0ca376acd13 (patch)
treef152b11389acfd059a9d0bcef5f31794656e25b3 /drivers
parent88d03a4087ad1c13b546e7d0962a885633d01b76 (diff)
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ENGR00144424 MX6: enable uboot for ARM2(SABREAUTO) CPU board
Use 528M DDR script Disable L2 cache because rom enable L2 cache when use plug-in Fix usdhc pad settings Remove mac address hardcode Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Anish Trivedi <anish@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/imx_esdhc.c17
-rw-r--r--drivers/mmc/mmc.c4
2 files changed, 14 insertions, 7 deletions
diff --git a/drivers/mmc/imx_esdhc.c b/drivers/mmc/imx_esdhc.c
index f31176f..a5345cb 100644
--- a/drivers/mmc/imx_esdhc.c
+++ b/drivers/mmc/imx_esdhc.c
@@ -209,8 +209,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
/* Send the command */
writel(cmd->cmdarg, &regs->cmdarg);
- /* for uSDHC, write to mixer control register */
- writel(xfertyp, &regs->mixctrl);
+ /* for uSDHC, write lower-half of xfertyp to mixctrl */
+ writel((xfertyp & 0xFFFF), &regs->mixctrl);
writel(xfertyp, &regs->xfertyp);
/* Mask all irqs */
@@ -478,7 +478,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
{
struct fsl_esdhc *regs;
struct mmc *mmc;
- u32 caps;
+ u32 ver, caps;
if (!cfg)
return -1;
@@ -497,6 +497,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
enable_usdhc();
#endif
+ ver = (readl(&regs->hostver) & ESDHC_HOSTVER_VVN_MASK)
+ >> ESDHC_HOSTVER_VVN_SHIFT;
+ if (SDHC_IS_USDHC(ver))
+ sprintf(mmc->name, "FSL_USDHC");
+
caps = readl(&regs->hostcapblt);
if (caps & ESDHC_HOSTCAPBLT_VS30)
mmc->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
@@ -512,8 +517,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
* it is to be used in SDR mode only. Use eSDHC for DDR mode.
*/
#ifndef CONFIG_MX50_ENABLE_USDHC_SDR
- if (((readl(&regs->hostver) & ESDHC_HOSTVER_VVN_MASK)
- >> ESDHC_HOSTVER_VVN_SHIFT) >= ESDHC_HOSTVER_DDR_SUPPORT)
+ if (ver >= ESDHC_HOSTVER_DDR_SUPPORT)
mmc->host_caps |= EMMC_MODE_4BIT_DDR;
#ifdef CONFIG_EMMC_DDR_PORT_DETECT
@@ -521,6 +525,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->host_caps |= EMMC_MODE_4BIT_DDR;
#endif
+ if (SDHC_IS_USDHC(ver))
+ mmc->host_caps |= EMMC_MODE_4BIT_DDR;
+
#endif /* #ifndef CONFIG_MX50_ENABLE_USDHC_SDR */
mmc->f_min = 400000;
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index ba14330..cf2a9a6 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -438,8 +438,8 @@ static int mmc_change_freq(struct mmc *mmc)
goto err_rtn;
/* Cards with density > 2GiB are sector addressed */
- if (ext_csd[212] || ext_csd[213] || ext_csd[214] || ext_csd[215] &&
- (mmc->capacity > (2u * 1024 * 1024 * 1024) / 512))
+ if ((ext_csd[212] || ext_csd[213] || ext_csd[214] || ext_csd[215]) &&
+ ((mmc->capacity > (2u * 1024 * 1024 * 1024) / 512)))
mmc->high_capacity = 1;
cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;