summaryrefslogtreecommitdiff
path: root/drivers/video
diff options
context:
space:
mode:
authorWolfgang Grandegger <wg@denx.de>2009-10-23 12:03:13 +0200
committerAnatolij Gustschin <agust@denx.de>2009-10-31 12:13:28 +0100
commitc28d3bbe963f4c57937d6fdc1dd63cd3562c147c (patch)
tree7bb2e6539685e5a72a222bb0a4364409d5d96aa7 /drivers/video
parentf2b4bc04d6aed6be712d236dab48ac4c4da22cbf (diff)
downloadu-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.zip
u-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.tar.gz
u-boot-imx-c28d3bbe963f4c57937d6fdc1dd63cd3562c147c.tar.bz2
video: mb862xx: improve board-specific Lime configuration
To avoid board-specific code accessing the mb862xx registers directly, the public function mb862xx_probe() has been introduced. Furthermore, the "Change of Clock Frequency" and "Set Memory I/F Mode" registers are now defined by CONFIG_SYS_MB862xx_CCF and CONFIG_SYS_MB862xx__MMR, respectively. The BSPs for the socrates and lwmon5 boards have been adapted accordingly. Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/mb862xx.c34
1 files changed, 33 insertions, 1 deletions
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index a8676cc..bb212a8 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -340,6 +340,30 @@ unsigned int card_init (void)
}
#endif
+
+#if !defined(CONFIG_VIDEO_CORALP)
+int mb862xx_probe(unsigned int addr)
+{
+ GraphicDevice *dev = &mb862xx;
+ unsigned int reg;
+
+ dev->frameAdrs = addr;
+ dev->dprBase = dev->frameAdrs + GC_DRAW_BASE;
+
+ /* Try to access GDC ID/Revision registers */
+ reg = HOST_RD_REG (GC_CID);
+ reg = HOST_RD_REG (GC_CID);
+ if (reg == 0x303) {
+ reg = DE_RD_REG(GC_REV);
+ reg = DE_RD_REG(GC_REV);
+ if ((reg & ~0xff) == 0x20050100)
+ return MB862XX_TYPE_LIME;
+ }
+
+ return 0;
+}
+#endif
+
void *video_hw_init (void)
{
GraphicDevice *dev = &mb862xx;
@@ -359,8 +383,16 @@ void *video_hw_init (void)
if ((dev->frameAdrs = board_video_init ()) == 0) {
puts ("Controller not found!\n");
return NULL;
- } else
+ } else {
puts ("Lime\n");
+
+ /* Set Change of Clock Frequency Register */
+ HOST_WR_REG (GC_CCF, CONFIG_SYS_MB862xx_CCF);
+ /* Delay required */
+ udelay(300);
+ /* Set Memory I/F Mode Register) */
+ HOST_WR_REG (GC_MMR, CONFIG_SYS_MB862xx_MMR);
+ }
#endif
de_init ();