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authorHans de Goede <hdegoede@redhat.com>2016-08-19 15:25:41 +0200
committerHans de Goede <hdegoede@redhat.com>2016-08-26 16:58:37 +0200
commit421c98d7d2ebf929debf907e75ec04419cf07dbe (patch)
tree066fff4164e808f9f502aaed7b7793eef541b753 /drivers/video
parent8d463c5a32f7d404ee1a0cd68d4746e2ebab9e22 (diff)
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sunxi: display: Use PWM to drive backlight where applicable
When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/sunxi_display.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c
index 56f6c8e..50b16a9 100644
--- a/drivers/video/sunxi_display.c
+++ b/drivers/video/sunxi_display.c
@@ -12,6 +12,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/display.h>
#include <asm/arch/gpio.h>
+#include <asm/arch/pwm.h>
#include <asm/global_data.h>
#include <asm/gpio.h>
#include <asm/io.h>
@@ -743,6 +744,16 @@ static void sunxi_lcdc_backlight_enable(void)
gpio_direction_output(pin, 1);
pin = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_BL_PWM);
+#ifdef SUNXI_PWM_PIN0
+ if (pin == SUNXI_PWM_PIN0) {
+ writel(SUNXI_PWM_CTRL_POLARITY0(PWM_ON) |
+ SUNXI_PWM_CTRL_ENABLE0 |
+ SUNXI_PWM_CTRL_PRESCALE0(0xf), SUNXI_PWM_CTRL_REG);
+ writel(SUNXI_PWM_PERIOD_80PCT, SUNXI_PWM_CH0_PERIOD);
+ sunxi_gpio_set_cfgpin(pin, SUNXI_PWM_MUX);
+ return;
+ }
+#endif
if (pin >= 0)
gpio_direction_output(pin, PWM_ON);
}