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author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-05-31 07:23:55 +0000 |
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committer | Anatolij Gustschin <agust@denx.de> | 2012-07-10 11:35:38 +0200 |
commit | 05d4df1d8a955228968fe9e9382f335950670cdd (patch) | |
tree | 56917892c0fd69fb0a583001698e7b15f23ba88c /drivers/video | |
parent | 8f47d917c6b863fa9c7df3114775fde4670f62b6 (diff) | |
download | u-boot-imx-05d4df1d8a955228968fe9e9382f335950670cdd.zip u-boot-imx-05d4df1d8a955228968fe9e9382f335950670cdd.tar.gz u-boot-imx-05d4df1d8a955228968fe9e9382f335950670cdd.tar.bz2 |
mx6: Allow mx6 to access the IPUv3 registers
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/ipu_regs.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index 93b195f..a43aa03 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -47,14 +47,24 @@ #define IPU_SMFC_REG_BASE 0x00050000 #define IPU_DC_REG_BASE 0x00058000 #define IPU_DMFC_REG_BASE 0x00060000 +#define IPU_VDI_REG_BASE 0x00680000 +#if defined(CONFIG_MX51) || defined(CONFIG_MX53) #define IPU_CPMEM_REG_BASE 0x01000000 #define IPU_LUT_REG_BASE 0x01020000 #define IPU_SRM_REG_BASE 0x01040000 #define IPU_TPM_REG_BASE 0x01060000 #define IPU_DC_TMPL_REG_BASE 0x01080000 #define IPU_ISP_TBPR_REG_BASE 0x010C0000 -#define IPU_VDI_REG_BASE 0x00680000 +#elif defined(CONFIG_MX6Q) +#define IPU_CPMEM_REG_BASE 0x00100000 +#define IPU_LUT_REG_BASE 0x00120000 +#define IPU_SRM_REG_BASE 0x00140000 +#define IPU_TPM_REG_BASE 0x00160000 +#define IPU_DC_TMPL_REG_BASE 0x00180000 +#define IPU_ISP_TBPR_REG_BASE 0x001C0000 +#endif +#define IPU_CTRL_BASE_ADDR (IPU_SOC_BASE_ADDR + IPU_SOC_OFFSET) extern u32 *ipu_dc_tmpl_reg; |