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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-09-27 10:21:00 +0000
committerTom Rini <trini@ti.com>2012-10-15 11:54:10 -0700
commit1f5e4ee0b9e06a129a6a1b117d77c77189c18542 (patch)
treec91d5ab5ace414429e70ccef2cacfde2d497a779 /drivers/video
parent846b38981f8014cc6562f3b89bef4c87cbc8ca2a (diff)
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mx5: Use explicit clock gate names
Use clock gate definitions having names showing clearly the gated clock instead of names giving only a register field index. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/video')
-rw-r--r--drivers/video/ipu_common.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index cc8f881..0f2d113 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -214,7 +214,7 @@ static struct clk ipu_clk = {
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR5)),
- .enable_shift = MXC_CCM_CCGR5_CG5_OFFSET,
+ .enable_shift = MXC_CCM_CCGR5_IPU_OFFSET,
#else
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR3)),