ENGR00134068 MX51 BBG:Support CLAA WVGA splashimage

1) IOMUX/backlight support for CLAA WVGA LCD panel.
2) Add video mode for CLAA WVGA LCD panel.
3) Support IPU di1 interface for framebuffer.
4) Enhance IPU driver.
5) Add freescale 600x400 8BPP BMP logo.

Signed-off-by: Terry Lv <R65388@freescale.com>
Signed-off-by: Liu Ying <b17645@freescale.com>

4 files changed, 49 insertions, 18 deletions

diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 88f6a52..0a47117 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -162,6 +162,7 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
 static int clk_ipu_enable(struct clk *clk)
 {
+	ipu_clk_enable();
 	return 0;
 }
 
@@ -169,7 +170,6 @@ static void clk_ipu_disable(struct clk *clk)
 {
 }
 
-
 static struct clk ipu_clk = {
 	.name = "ipu_clk",
 	.rate = 133000000,
@@ -976,8 +976,12 @@ int32_t ipu_enable_channel(ipu_channel_t channel)
 	}
 
 	if ((channel == MEM_DC_SYNC) || (channel == MEM_BG_SYNC) ||
-	    (channel == MEM_FG_SYNC))
+	    (channel == MEM_FG_SYNC)) {
+		reg = __raw_readl(IDMAC_WM_EN(in_dma));
+		__raw_writel(reg | idma_mask(in_dma), IDMAC_WM_EN(in_dma));
+
 		ipu_dp_dc_enable(channel);
+	}
 
 	g_channel_enable_mask |= 1L << IPU_CHAN_ID(channel);
 
diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c
index ad03a01..8ea12f8 100644
--- a/drivers/video/ipu_disp.c
+++ b/drivers/video/ipu_disp.c
@@ -913,6 +913,9 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
 	/* Init clocking */
 	debug("pixel clk = %d\n", pixel_clk);
 
+	/* clear DI */
+	__raw_writel((1 << 21), DI_GENERAL(disp));
+
 	if (sig.ext_clk) {
 		if (!(g_di1_tvout && (disp == 1))) { /*not round div for tvout*/
 			/*
@@ -951,6 +954,14 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
 	div = clk_get_rate(clk_get_parent(g_pixel_clk[disp])) /
 		rounded_pixel_clk;
 
+	/* Enable for a divide by 2 clock change. */
+	reg = __raw_readl(IPU_PM);
+	reg &= ~(0x7f << 7);
+	reg |= 0x20 << 7;
+	reg &= ~(0x7f << 23);
+	reg |= 0x20 << 23;
+	__raw_writel(reg, IPU_PM);
+
 	ipu_di_data_wave_config(disp, SYNC_WAVE, div - 1, div - 1);
 	ipu_di_data_pin_config(disp, SYNC_WAVE, DI_PIN15, 3, 0, div * 2);
 
@@ -1175,6 +1186,11 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
 		__raw_writel(0, DI_STP_REP(disp, 7));
 		__raw_writel(0, DI_STP_REP(disp, 9));
 
+		h_total = ((width + h_start_width + h_sync_width) / 2) - 2;
+		ipu_di_sync_config(disp, 6, 1, 0, 2, DI_SYNC_CLK, h_total,
+				DI_SYNC_INT_HSYNC, 0, DI_SYNC_NONE,
+				DI_SYNC_NONE, 0, 0);
+
 		/* Init template microcode */
 		if (disp) {
 		   ipu_dc_write_tmpl(2, WROD(0), 0, map, SYNC_WAVE, 8, 5);
@@ -1194,12 +1210,18 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk,
 		if (sig.clk_pol)
 			di_gen |= DI_GEN_POL_CLK;
 
+		/* Set the clock to stop at counter 6. */
+		di_gen |= 0x6000000;
 	}
 
 	__raw_writel(di_gen, DI_GENERAL(disp));
 
-	__raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET) |
-			0x00000002, DI_SYNC_AS_GEN(disp));
+	if (sig.interlaced)
+		__raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET) |
+				0x00000002, DI_SYNC_AS_GEN(disp));
+	else
+		__raw_writel((--vsync_cnt << DI_VSYNC_SEL_OFFSET),
+				DI_SYNC_AS_GEN(disp));
 
 	reg = __raw_readl(DI_POL(disp));
 	reg &= ~(DI_POL_DRDY_DATA_POLARITY | DI_POL_DRDY_POLARITY_15);
diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h
index 36f07bb..762f804 100644
--- a/drivers/video/ipu_regs.h
+++ b/drivers/video/ipu_regs.h
@@ -6,7 +6,7 @@
  *
  * Linux IPU driver for MX51:
  *
- * (C) Copyright 2005-2009 Freescale Semiconductor, Inc.
+ * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -314,6 +314,7 @@ struct ipu_dmfc {
 #define IPU_FS_DISP_FLOW1	(&IPU_CM_REG->fs_disp_flow[0])
 #define IPU_DISP_GEN		(&IPU_CM_REG->disp_gen)
 #define IPU_MEM_RST		(&IPU_CM_REG->mem_rst)
+#define IPU_PM                  (&IPU_CM_REG->pm)
 #define IPU_GPR			(&IPU_CM_REG->gpr)
 #define IPU_CHA_DB_MODE_SEL(ch)	(&IPU_CM_REG->ch_db_mode_sel[ch / 32])
 
@@ -330,6 +331,7 @@ struct ipu_dmfc {
 #define IDMAC_CONF		(&IDMAC_REG->conf)
 #define IDMAC_CHA_EN(ch)	(&IDMAC_REG->ch_en[ch / 32])
 #define IDMAC_CHA_PRI(ch)	(&IDMAC_REG->ch_pri[ch / 32])
+#define IDMAC_WM_EN(ch)		(&IDMAC_REG->wm_en[ch / 32])
 
 #define DI_REG(di)		((struct ipu_di *)(IPU_CTRL_BASE_ADDR + \
 				((di == 1) ? IPU_DI1_REG_BASE : \
diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c
index 142e7b7..cb1d623 100644
--- a/drivers/video/mxc_ipuv3_fb.c
+++ b/drivers/video/mxc_ipuv3_fb.c
@@ -42,6 +42,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+extern vidinfo_t panel_info;
+
 void *lcd_base;			/* Start of framebuffer memory	*/
 void *lcd_console_address;	/* Start of console buffer	*/
 
@@ -52,8 +54,6 @@ int lcd_color_bg;
 short console_col;
 short console_row;
 
-vidinfo_t panel_info;
-
 static int mxcfb_map_video_memory(struct fb_info *fbi);
 static int mxcfb_unmap_video_memory(struct fb_info *fbi);
 
@@ -440,8 +440,10 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
 				    fbi->fix.line_length;
 	}
 
-	fbi->screen_base = (char *)lcd_base;
-	fbi->fix.smem_start = (unsigned long)lcd_base;
+	fbi->screen_base =
+		(char *)iomem_to_phys((unsigned long)lcd_base);
+	fbi->fix.smem_start =
+		(unsigned long)iomem_to_phys((unsigned long)lcd_base);
 	if (fbi->screen_base == 0) {
 		puts("Unable to allocate framebuffer memory\n");
 		fbi->fix.smem_len = 0;
@@ -454,9 +456,6 @@ static int mxcfb_map_video_memory(struct fb_info *fbi)
 
 	fbi->screen_size = fbi->fix.smem_len;
 
-	/* Clear the screen */
-	memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
-
 	return 0;
 }
 
@@ -526,7 +525,7 @@ static struct fb_info *mxcfb_init_fbinfo(void)
  *
  * @return      Appropriate error code to the kernel common code
  */
-static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
+static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode, int di)
 {
 	struct fb_info *fbi;
 	struct mxcfb_info *mxcfbi;
@@ -550,7 +549,7 @@ static int mxcfb_probe(u32 interface_pix_fmt, struct fb_videomode *mode)
 		mxcfbi->blank = FB_BLANK_POWERDOWN;
 	}
 
-	mxcfbi->ipu_di = 0;
+	mxcfbi->ipu_di = di;
 
 	ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80);
 	ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0);
@@ -603,6 +602,12 @@ err0:
 	return ret;
 }
 
+ulong calc_fbsize(void)
+{
+	return (panel_info.vl_col * panel_info.vl_row *
+		NBITS(panel_info.vl_bpix)) / 8;
+}
+
 int overwrite_console(void)
 {
 	/* Keep stdout / stderr on serial, our LCD is for splashscreen only */
@@ -625,7 +630,7 @@ void lcd_ctrl_init(void *lcdbase)
 	memset(lcdbase, 0, mem_len);
 }
 
-int mx51_fb_init(struct fb_videomode *mode)
+int mx51_fb_init(struct fb_videomode *mode, int di, int interface_pix_fmt)
 {
 	int ret;
 
@@ -633,10 +638,8 @@ int mx51_fb_init(struct fb_videomode *mode)
 	if (ret)
 		puts("Error initializing IPU\n");
 
-	lcd_base += 56;
-
 	debug("Framebuffer at 0x%x\n", (unsigned int)lcd_base);
-	ret = mxcfb_probe(IPU_PIX_FMT_RGB666, mode);
+	ret = mxcfb_probe(interface_pix_fmt, mode, di);
 
 	return ret;
 }