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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-10-29 15:46:21 -0200 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2013-10-30 10:37:59 +0100 |
| commit | 2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97 (patch) | |
| tree | 8ee1b01aabb73629d931048b736a06d3e557b35e /drivers/video | |
| parent | 7e575c46c34b5f1316eab39025fdced197629ccb (diff) | |
| download | u-boot-imx-2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97.zip u-boot-imx-2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97.tar.gz u-boot-imx-2740e5de4f3cd0aa36efcfe1a995fb6e3858cc97.tar.bz2 | |
video: ipu_disp: Fix clock polarity logic
Currently the HDMI splash screen image quality on mx6solo does not show a
very stable image.
By comparing the IPU driver from U-boot with the one from FSL 4.1.0 BSP,
we can see that there is an inverted logic for setting the DI_GEN_POL_CLK bit.
>From FSL BSP [1] we have:
if (!sig.clk_pol)
di_gen |= DI_GEN_POLARITY_DISP_CLK;
Applying the same logic into U-boot fixes the HDMI image stability.
[1] git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_disp.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/ipu_disp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c index 2e91356..22ac142 100644 --- a/drivers/video/ipu_disp.c +++ b/drivers/video/ipu_disp.c @@ -1178,7 +1178,7 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, if (sig.Vsync_pol) di_gen |= DI_GEN_POLARITY_3; - if (sig.clk_pol) + if (!sig.clk_pol) di_gen |= DI_GEN_POL_CLK; } |