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authorStephen Warren <swarren@nvidia.com>2014-03-21 12:28:58 -0600
committerTom Warren <twarren@nvidia.com>2014-04-17 08:41:05 -0700
commit70ad375ee444645001d3ca78bb17790b50232999 (patch)
tree5b6b1edfc674954bee1e8546bc173e74d2976b0b /drivers/video/tegra.c
parentdfb42fc95df6b5908fb593db9132018233430fe9 (diff)
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ARM: tegra: Tegra20 pinmux cleanup
This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'drivers/video/tegra.c')
-rw-r--r--drivers/video/tegra.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index c047e6e..57cb007 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -229,8 +229,8 @@ static int handle_stage(const void *blob)
break;
case STAGE_PWM:
/* Enable PWM at 15/16 high, 32768 Hz with divider 1 */
- pinmux_set_func(PINGRP_GPU, PMUX_FUNC_PWM);
- pinmux_tristate_disable(PINGRP_GPU);
+ pinmux_set_func(PMUX_PINGRP_GPU, PMUX_FUNC_PWM);
+ pinmux_tristate_disable(PMUX_PINGRP_GPU);
pwm_enable(config.pwm_channel, 32768, 0xdf, 1);
break;