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| author | Marek Vasut <marek.vasut@gmail.com> | 2011-09-26 02:26:05 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-10-01 23:26:36 +0200 |
| commit | 564964bd8527667bf88a47890d73cac5eec16c55 (patch) | |
| tree | 2c0b9d1295784eeb05ccacb7b0a9ab73fec2049a /drivers/video/ipu_regs.h | |
| parent | be547c6db32dce6bb5644d11f9efee0944434ac6 (diff) | |
| download | u-boot-imx-564964bd8527667bf88a47890d73cac5eec16c55.zip u-boot-imx-564964bd8527667bf88a47890d73cac5eec16c55.tar.gz u-boot-imx-564964bd8527667bf88a47890d73cac5eec16c55.tar.bz2 | |
GCC4.6: Squash warnings in ipu_disp.c
ipu_disp.c: In function ‘ipu_disp_set_global_alpha’:
ipu_disp.c:1237:11: warning: variable ‘flow’ set but not used
[-Wunused-but-set-variable]
ipu_disp.c: In function ‘ipu_disp_set_color_key’:
ipu_disp.c:1302:16: warning: variable ‘flow’ set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/video/ipu_regs.h')
| -rw-r--r-- | drivers/video/ipu_regs.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index 36f07bb..9964c20 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -402,15 +402,15 @@ static inline struct ipu_dc_ch *dc_ch_offset(int ch) #define DP_REG ((struct ipu_dp *)(IPU_CTRL_BASE_ADDR + \ IPU_DP_REG_BASE)) -#define DP_COM_CONF(flow) (&DP_REG->com_conf_sync) -#define DP_GRAPH_WIND_CTRL(flow) (&DP_REG->graph_wind_ctrl_sync) -#define DP_CSC_A_0(flow) (&DP_REG->csca_sync[0]) -#define DP_CSC_A_1(flow) (&DP_REG->csca_sync[1]) -#define DP_CSC_A_2(flow) (&DP_REG->csca_sync[2]) -#define DP_CSC_A_3(flow) (&DP_REG->csca_sync[3]) - -#define DP_CSC_0(flow) (&DP_REG->csc_sync[0]) -#define DP_CSC_1(flow) (&DP_REG->csc_sync[1]) +#define DP_COM_CONF() (&DP_REG->com_conf_sync) +#define DP_GRAPH_WIND_CTRL() (&DP_REG->graph_wind_ctrl_sync) +#define DP_CSC_A_0() (&DP_REG->csca_sync[0]) +#define DP_CSC_A_1() (&DP_REG->csca_sync[1]) +#define DP_CSC_A_2() (&DP_REG->csca_sync[2]) +#define DP_CSC_A_3() (&DP_REG->csca_sync[3]) + +#define DP_CSC_0() (&DP_REG->csc_sync[0]) +#define DP_CSC_1() (&DP_REG->csc_sync[1]) /* DC template opcodes */ #define WROD(lf) (0x18 | (lf << 1)) |