diff options
author | Simon Glass <sjg@chromium.org> | 2013-05-10 19:49:00 -0700 |
---|---|---|
committer | Marek Vasut <marex@denx.de> | 2013-06-12 22:22:50 +0200 |
commit | ed10e66aba4d6a0151dc6dff2fa93d5fd19bc8a2 (patch) | |
tree | 6483ddac306970b6565ab6897ab949ed9ffa9b43 /drivers/usb | |
parent | 5da2dc9789abecb1b018beb0c93f4c38c2985bc6 (diff) | |
download | u-boot-imx-ed10e66aba4d6a0151dc6dff2fa93d5fd19bc8a2.zip u-boot-imx-ed10e66aba4d6a0151dc6dff2fa93d5fd19bc8a2.tar.gz u-boot-imx-ed10e66aba4d6a0151dc6dff2fa93d5fd19bc8a2.tar.bz2 |
usb: Correct CLEAR_FEATURE code in ehci-hcd
This commit broke USB2 on link (Chromebook Pixel):
020bbcb usb: hub: Power-cycle on root-hub ports
However the root cause seems to be a missing mask and missing 'break'
in ehci-hcd.c. This patch fixes both.
On link, 'usb start' with a USB keyboard and memory stick inserted now
finds both. The keyboard works as expected. Also ext2ls shows a directory
listing from the memory stick.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/host/ehci-hcd.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index e0f3e4b..445759b 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -809,21 +809,23 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, break; case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): reg = ehci_readl(status_reg); + reg &= ~EHCI_PS_CLEAR; switch (le16_to_cpu(req->value)) { case USB_PORT_FEAT_ENABLE: reg &= ~EHCI_PS_PE; break; case USB_PORT_FEAT_C_ENABLE: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; + reg |= EHCI_PS_PE; break; case USB_PORT_FEAT_POWER: if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) - reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); + reg &= ~EHCI_PS_PP; + break; case USB_PORT_FEAT_C_CONNECTION: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; + reg |= EHCI_PS_CSC; break; case USB_PORT_FEAT_OVER_CURRENT: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; + reg |= EHCI_PS_OCC; break; case USB_PORT_FEAT_C_RESET: ctrl->portreset &= ~(1 << port); |