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authorSteve Sakoman <steve@sakoman.com>2010-06-25 12:42:04 -0700
committerSandeep Paulraj <s-paulraj@ti.com>2010-08-05 10:11:34 -0400
commit9b16757758411996f36348fa688d03fced8d5e5e (patch)
treec67dd9029149b3c41b313b6d91528b98183c7810 /drivers/usb
parent516799f6777caab2151ed276a3c198940962f06a (diff)
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ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4
Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'drivers/usb')
-rw-r--r--drivers/usb/musb/omap3.c16
-rw-r--r--drivers/usb/musb/omap3.h3
2 files changed, 18 insertions, 1 deletions
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index a983552..c7876ed 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -31,6 +31,7 @@
*/
#include <twl4030.h>
+#include <twl6030.h>
#include "omap3.h"
static int platform_needs_initialization = 1;
@@ -65,7 +66,12 @@ static struct omap3_otg_regs *otg;
#define OMAP3_OTG_SYSSTATUS_RESETDONE 0x0001
+/* OMAP4430 has an internal PHY, use it */
+#ifdef CONFIG_OMAP4430
+#define OMAP3_OTG_INTERFSEL_OMAP 0x0000
+#else
#define OMAP3_OTG_INTERFSEL_OMAP 0x0001
+#endif
#define OMAP3_OTG_FORCESTDBY_STANDBY 0x0001
@@ -105,6 +111,11 @@ int musb_platform_init(void)
goto end;
}
#endif
+
+#ifdef CONFIG_TWL6030_POWER
+ twl6030_usb_device_settings();
+#endif
+
otg = (struct omap3_otg_regs *)OMAP3_OTG_BASE;
/* Set OTG to always be on */
@@ -122,6 +133,11 @@ int musb_platform_init(void)
#ifdef CONFIG_OMAP3_EVM
musb_cfg.extvbus = omap3_evm_need_extvbus();
#endif
+
+#ifdef CONFIG_OMAP4430
+ u32 *usbotghs_control = (u32 *)(CTRL_BASE + 0x33C);
+ *usbotghs_control = 0x15;
+#endif
platform_needs_initialization = 0;
}
diff --git a/drivers/usb/musb/omap3.h b/drivers/usb/musb/omap3.h
index 2886d7e..b2acdf4 100644
--- a/drivers/usb/musb/omap3.h
+++ b/drivers/usb/musb/omap3.h
@@ -31,10 +31,11 @@
#ifndef _MUSB_OMAP3_H_
#define _MUSB_OMAP3_H_
+#include <asm/arch/cpu.h>
#include "musb_core.h"
/* Base address of MUSB registers */
-#define MENTOR_USB0_BASE (OMAP34XX_CORE_L4_IO_BASE + 0xAB000)
+#define MENTOR_USB0_BASE MUSB_BASE
/* Base address of OTG registers */
#define OMAP3_OTG_BASE (MENTOR_USB0_BASE + 0x400)