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author | Tom Rini <trini@konsulko.com> | 2015-03-01 21:07:53 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2015-03-01 21:07:53 -0500 |
commit | 1da7ce4155d0839d9d56525379493bb0f80b5330 (patch) | |
tree | a29a93170e68b30d1a5b73a8210ddb92b5aaa3c7 /drivers/usb/host | |
parent | fc834100950ab630f442aece500d8c9ccfa2b992 (diff) | |
parent | 105a9e705efaeeac63e795e2a184b0a18db0ac5a (diff) | |
download | u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.zip u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.tar.gz u-boot-imx-1da7ce4155d0839d9d56525379493bb0f80b5330.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'drivers/usb/host')
-rw-r--r-- | drivers/usb/host/Kconfig | 10 | ||||
-rw-r--r-- | drivers/usb/host/Makefile | 1 | ||||
-rw-r--r-- | drivers/usb/host/ehci-uniphier.c | 25 | ||||
-rw-r--r-- | drivers/usb/host/xhci-uniphier.c | 85 |
4 files changed, 108 insertions, 13 deletions
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 30d1457..24a595f 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -17,6 +17,14 @@ config USB_XHCI if USB_XHCI_HCD +config USB_XHCI_UNIPHIER + bool "Support for Panasonic UniPhier on-chip xHCI USB controller" + depends on ARCH_UNIPHIER + default y + ---help--- + Enables support for the on-chip xHCI controller on Panasonic + UniPhier SoCs. + endif config USB_EHCI_HCD @@ -47,7 +55,7 @@ if USB_EHCI_HCD config USB_EHCI_UNIPHIER bool "Support for Panasonic UniPhier on-chip EHCI USB controller" - depends on ARCH_UNIPHIER + depends on ARCH_UNIPHIER && OF_CONTROL default y ---help--- Enables support for the on-chip EHCI controller on Panasonic diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 66d6e9a..eb6f34b 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -48,6 +48,7 @@ obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o +obj-$(CONFIG_USB_XHCI_UNIPHIER) += xhci-uniphier.o # designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/ehci-uniphier.c b/drivers/usb/host/ehci-uniphier.c index 32a4375..b5ec296 100644 --- a/drivers/usb/host/ehci-uniphier.c +++ b/drivers/usb/host/ehci-uniphier.c @@ -7,12 +7,12 @@ #include <common.h> #include <linux/err.h> +#include <asm/io.h> #include <usb.h> -#include <asm/arch/ehci-uniphier.h> +#include <mach/mio-regs.h> +#include <fdtdec.h> #include "ehci.h" -#ifdef CONFIG_OF_CONTROL -#include <fdtdec.h> DECLARE_GLOBAL_DATA_PTR; #define FDT gd->fdt_blob @@ -35,18 +35,19 @@ static int get_uniphier_ehci_base(int index, struct ehci_hccr **base) return -ENODEV; /* not found */ } -#else -static int get_uniphier_ehci_base(int index, struct ehci_hccr **base) + +static void uniphier_ehci_reset(int index, int on) { - *base = (struct ehci_hccr *)uniphier_ehci_platdata[index].base; - return 0; + u32 tmp; + + tmp = readl(MIO_USB_RSTCTRL(index)); + if (on) + tmp &= ~MIO_USB_RSTCTRL_XRST; + else + tmp |= MIO_USB_RSTCTRL_XRST; + writel(tmp, MIO_USB_RSTCTRL(index)); } -#endif -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - */ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { diff --git a/drivers/usb/host/xhci-uniphier.c b/drivers/usb/host/xhci-uniphier.c new file mode 100644 index 0000000..08b15e0 --- /dev/null +++ b/drivers/usb/host/xhci-uniphier.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2015 Panasonic Corporation + * Author: Masahiro Yamada <yamada.m@jp.panasonic.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/err.h> +#include <usb.h> +#include <fdtdec.h> +#include "xhci.h" + +static int get_uniphier_xhci_base(int index, struct xhci_hccr **base) +{ + DECLARE_GLOBAL_DATA_PTR; + int node_list[2]; + fdt_addr_t addr; + int count; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "usb", + COMPAT_PANASONIC_XHCI, node_list, + ARRAY_SIZE(node_list)); + + if (index >= count) + return -ENODEV; + + addr = fdtdec_get_addr(gd->fdt_blob, node_list[index], "reg"); + if (addr == FDT_ADDR_T_NONE) + return -ENODEV; + + *base = (struct xhci_hccr *)addr; + + return 0; +} + +#define USB3_RST_CTRL 0x00100040 +#define IOMMU_RST_N (1 << 5) +#define LINK_RST_N (1 << 4) + +static void uniphier_xhci_reset(void __iomem *base, int on) +{ + u32 tmp; + + tmp = readl(base + USB3_RST_CTRL); + + if (on) + tmp &= ~(IOMMU_RST_N | LINK_RST_N); + else + tmp |= IOMMU_RST_N | LINK_RST_N; + + writel(tmp, base + USB3_RST_CTRL); +} + +int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor) +{ + int ret; + struct xhci_hccr *cr; + struct xhci_hcor *or; + + ret = get_uniphier_xhci_base(index, &cr); + if (ret < 0) + return ret; + + uniphier_xhci_reset(cr, 0); + + or = (void *)cr + HC_LENGTH(xhci_readl(&cr->cr_capbase)); + + *hccr = cr; + *hcor = or; + + return 0; +} + +void xhci_hcd_stop(int index) +{ + int ret; + struct xhci_hccr *cr; + + ret = get_uniphier_xhci_base(index, &cr); + if (ret < 0) + return; + + uniphier_xhci_reset(cr, 1); +} |