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| author | Marek Vasut <marex@denx.de> | 2014-11-04 04:13:57 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-11-07 16:32:02 +0100 |
| commit | d1b6c77e1f7ed4821da008c80325f589fcf44df9 (patch) | |
| tree | a6012076d4d28bc88642332efb75c48297f79bb2 /drivers/usb/gadget/s3c_udc_otg.c | |
| parent | 40ff06b958dca8a17f6f42a511edb823e30ce1c0 (diff) | |
| download | u-boot-imx-d1b6c77e1f7ed4821da008c80325f589fcf44df9.zip u-boot-imx-d1b6c77e1f7ed4821da008c80325f589fcf44df9.tar.gz u-boot-imx-d1b6c77e1f7ed4821da008c80325f589fcf44df9.tar.bz2 | |
usb: s3c-otg: Split out PHY control
Split the Samsung specific PHY control into a separate file
and compile this into the S3C OTG driver only if used on a
Samsung system.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Diffstat (limited to 'drivers/usb/gadget/s3c_udc_otg.c')
| -rw-r--r-- | drivers/usb/gadget/s3c_udc_otg.c | 64 |
1 files changed, 2 insertions, 62 deletions
diff --git a/drivers/usb/gadget/s3c_udc_otg.c b/drivers/usb/gadget/s3c_udc_otg.c index b808ddaf..b910053 100644 --- a/drivers/usb/gadget/s3c_udc_otg.c +++ b/drivers/usb/gadget/s3c_udc_otg.c @@ -151,68 +151,8 @@ bool dfu_usb_get_reset(void) return !!(readl(®->gintsts) & INT_RESET); } -void otg_phy_init(struct s3c_udc *dev) -{ - unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; - - dev->pdata->phy_control(1); - - /*USB PHY0 Enable */ - printf("USB PHY0 Enable\n"); - - /* Enable PHY */ - writel(readl(usb_phy_ctrl) | USB_PHY_CTRL_EN0, usb_phy_ctrl); - - if (dev->pdata->usb_flags == PHY0_SLEEP) /* C210 Universal */ - writel((readl(&phy->phypwr) - &~(PHY_0_SLEEP | OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0), &phy->phypwr); - else /* C110 GONI */ - writel((readl(&phy->phypwr) &~(OTG_DISABLE_0 | ANALOG_PWRDOWN) - &~FORCE_SUSPEND_0), &phy->phypwr); - - if (s5p_cpu_id == 0x4412) - writel((readl(&phy->phyclk) & ~(EXYNOS4X12_ID_PULLUP0 | - EXYNOS4X12_COMMON_ON_N0)) | EXYNOS4X12_CLK_SEL_24MHZ, - &phy->phyclk); /* PLL 24Mhz */ - else - writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)) | - CLK_SEL_24MHZ, &phy->phyclk); /* PLL 24Mhz */ - - writel((readl(&phy->rstcon) &~(LINK_SW_RST | PHYLNK_SW_RST)) - | PHY_SW_RST0, &phy->rstcon); - udelay(10); - writel(readl(&phy->rstcon) - &~(PHY_SW_RST0 | LINK_SW_RST | PHYLNK_SW_RST), &phy->rstcon); - udelay(10); -} - -void otg_phy_off(struct s3c_udc *dev) -{ - unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl; - struct s3c_usbotg_phy *phy = - (struct s3c_usbotg_phy *)dev->pdata->regs_phy; - - /* reset controller just in case */ - writel(PHY_SW_RST0, &phy->rstcon); - udelay(20); - writel(readl(&phy->phypwr) &~PHY_SW_RST0, &phy->rstcon); - udelay(20); - - writel(readl(&phy->phypwr) | OTG_DISABLE_0 | ANALOG_PWRDOWN - | FORCE_SUSPEND_0, &phy->phypwr); - - writel(readl(usb_phy_ctrl) &~USB_PHY_CTRL_EN0, usb_phy_ctrl); - - writel((readl(&phy->phyclk) & ~(ID_PULLUP0 | COMMON_ON_N0)), - &phy->phyclk); - - udelay(10000); - - dev->pdata->phy_control(0); -} +__weak void otg_phy_init(struct s3c_udc *dev) {} +__weak void otg_phy_off(struct s3c_udc *dev) {} /***********************************************************/ |