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| author | Marek Vasut <marex@denx.de> | 2015-12-04 02:44:33 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-12-17 21:54:40 +0100 |
| commit | 507e677bc4f25b15d81d599c3d8b669ab9846493 (patch) | |
| tree | 90c28230656c338a3bfba6fc5574a0758061c38a /drivers/usb/gadget/dwc2_udc_otg.c | |
| parent | be5e4bdcedbd3bf5f2717fc22356e825bca0fbcd (diff) | |
| download | u-boot-imx-507e677bc4f25b15d81d599c3d8b669ab9846493.zip u-boot-imx-507e677bc4f25b15d81d599c3d8b669ab9846493.tar.gz u-boot-imx-507e677bc4f25b15d81d599c3d8b669ab9846493.tar.bz2 | |
usb: s3c-otg: Rename remaining macros
The driver is actually for the Designware DWC2 controller.
This patch renames the remaining S3C_* macros to match the
DWC2 naming.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/usb/gadget/dwc2_udc_otg.c')
| -rw-r--r-- | drivers/usb/gadget/dwc2_udc_otg.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index 40a7125..93514a9 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -190,7 +190,7 @@ static void udc_reinit(struct dwc2_udc *dev) dev->ep0state = WAIT_FOR_SETUP; /* basic endpoint records init */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { struct dwc2_ep *ep = &dev->ep[i]; if (i != 0) @@ -380,7 +380,7 @@ static void stop_activity(struct dwc2_udc *dev, dev->gadget.speed = USB_SPEED_UNKNOWN; /* prevent new request submissions, kill any outstanding requests */ - for (i = 0; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) { struct dwc2_ep *ep = &dev->ep[i]; ep->stopped = 1; nuke(ep, -ESHUTDOWN); @@ -448,7 +448,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl); writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl); - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) { + for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) { writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl); writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl); } @@ -470,7 +470,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, ®->gnptxfsiz); - for (i = 1; i < S3C_MAX_HW_ENDPOINTS; i++) + for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++) writel((PTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + PTX_FIFO_SIZE*(i-1)) >> 2) << 0, @@ -479,13 +479,13 @@ static void reconfig_usbd(struct dwc2_udc *dev) /* Flush the RX FIFO */ writel(RX_FIFO_FLUSH, ®->grstctl); while (readl(®->grstctl) & RX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); /* Flush all the Tx FIFO's */ writel(TX_FIFO_FLUSH_ALL, ®->grstctl); writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl); while (readl(®->grstctl) & TX_FIFO_FLUSH) - debug("%s: waiting for S3C_UDC_OTG_GRSTCTL\n", __func__); + debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__); /* 13. Clear NAK bit of EP0, EP1, EP2*/ /* For Slave mode*/ @@ -515,7 +515,7 @@ static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed) } dev->ep[0].ep.maxpacket = ep0_fifo_size; - for (i = 1; i < S3C_MAX_ENDPOINTS; i++) + for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) dev->ep[i].ep.maxpacket = ep_fifo_size; /* EP0 - Control IN (64 bytes)*/ |