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authorPeng Fan <Peng.Fan@freescale.com>2015-04-14 13:44:24 +0800
committerPeng Fan <Peng.Fan@freescale.com>2015-04-29 15:05:29 +0800
commit8567c2824d6293eb0711a5d71860ac8581b02d0b (patch)
tree80e07a74608e1f2905394c2726f6cb9c080fc834 /drivers/thermal
parentc6e73057773052b8f7d7b1bbc795d3efbc174a45 (diff)
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MLK-10774-42 imx:mx7:thermal fix reading temperature
Fix reading temperature. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'drivers/thermal')
-rw-r--r--drivers/thermal/imx_thermal.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
index cc355b3..3e794c7 100644
--- a/drivers/thermal/imx_thermal.c
+++ b/drivers/thermal/imx_thermal.c
@@ -165,27 +165,27 @@ static int read_cpu_temperature(struct udevice *dev)
writel(TEMPMON_HW_ANADIG_TEMPSENSE1_MEASURE_TEMP_MASK, &ccm_anatop->tempsense1_set);
start = get_timer(0);
- /* Wait max 2s */
+ /* Wait max 100ms */
do {
+ /*
+ * Since we can not rely on finish bit, use 1ms delay to get
+ * temperature. From RM, 17us is enough to get data, but
+ * to gurantee to get the data, delay 100ms here.
+ */
reg = readl(&ccm_anatop->tempsense1);
tmp = (reg & TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_MASK)
>> TEMPMON_HW_ANADIG_TEMPSENSE1_TEMP_VALUE_SHIFT;
- if (tmp != 0)
- break;
- } while (get_timer(0) < (start + 2000));
- /* Still not get invalid temperature? */
- if (tmp == 0)
- return -EINVAL;
+ } while (get_timer(0) < (start + 100));
writel(TEMPMON_HW_ANADIG_TEMPSENSE1_FINISHED_MASK, &ccm_anatop->tempsense1_clr);
- /* Single point */
- temperature = tmp - (te1 - raw_25c);
-
/* power down anatop thermal sensor */
writel(TEMPMON_HW_ANADIG_TEMPSENSE1_POWER_DOWN_MASK, &ccm_anatop->tempsense1_set);
writel(PMU_REF_REFTOP_SELFBIASOFF_MASK, &ccm_anatop->ref_clr);
+ /* Single point */
+ temperature = tmp - (te1 - raw_25c);
+
return temperature;
}
#endif