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| author | Tom Rini <trini@ti.com> | 2012-10-26 15:44:31 -0700 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2012-10-26 15:44:31 -0700 |
| commit | 5bb3505fa867ded03cbee83f7722ab5182930637 (patch) | |
| tree | 1830ce86f88d280eb1a004d3f954f684c548cdce /drivers/spi | |
| parent | 8440f18a4818d52ba51bb9f0b07ce6439f1b6a57 (diff) | |
| parent | b68d6712c379735e886ef9c01b946bc36f295273 (diff) | |
| download | u-boot-imx-5bb3505fa867ded03cbee83f7722ab5182930637.zip u-boot-imx-5bb3505fa867ded03cbee83f7722ab5182930637.tar.gz u-boot-imx-5bb3505fa867ded03cbee83f7722ab5182930637.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'drivers/spi')
| -rw-r--r-- | drivers/spi/omap3_spi.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index e40a632..6791a7e 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -173,14 +173,13 @@ int spi_claim_bus(struct spi_slave *slave) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ -#ifdef CONFIG_AM33XX +#ifdef CONFIG_OMAP3_SPI_D0_D1_SWAPPED /* - * The reference design on AM33xx has D0 and D1 wired up opposite - * of how it has been done on previous platforms. We assume that - * custom hardware will also follow this convention. + * Some boards have D0 wired as MOSI / D1 as MISO instead of + * The normal D0 as MISO / D1 as MOSI. */ - conf &= OMAP3_MCSPI_CHCONF_DPE0; - conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); + conf &= ~OMAP3_MCSPI_CHCONF_DPE0; + conf |= OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1; #else conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); conf |= OMAP3_MCSPI_CHCONF_DPE0; |