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authorvishalm@ti.com <vishalm@ti.com>2015-08-17 10:47:51 -0500
committerJagan Teki <jteki@openedev.com>2015-08-17 23:29:14 +0530
commita39cfe717c4152ececea5c4ce0aa2e97faa263ab (patch)
tree22ef05ecc0b07b8153440082f23a9019e1fe0d8f /drivers/spi
parent0a02655481834a4ebdf457e43c24729ffd7daf37 (diff)
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ti: qspi: set flash quad bit based on quad support flag
Update op_mode_rx flag based on CONFIG_QSPI_QUAD_SUPPORT flag, instead of platform. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/ti_qspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index 3356c0f..af40ec8 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -106,7 +106,6 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
slave->memory_map = (void *)MMAP_START_ADDR_DRA;
#else
slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
- slave->op_mode_rx = 8;
#endif
#ifdef CONFIG_QSPI_QUAD_SUPPORT
@@ -114,6 +113,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
QSPI_SETUP0_NUM_D_BYTES_8_BITS |
QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE |
QSPI_NUM_DUMMY_BITS);
+ slave->op_mode_rx = SPI_OPM_RX_QOF;
#else
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES |
QSPI_SETUP0_NUM_D_BYTES_NO_BITS |