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authorJagan Teki <jteki@openedev.com>2015-09-08 01:39:44 +0530
committerJagan Teki <jteki@openedev.com>2015-10-25 20:17:03 +0530
commit2775e91835638031d1134176d536ac2946fc5e6b (patch)
treed555520733d8ab27e8f95b5f6959e0e976fe89ef /drivers/spi/zynq_qspi.c
parent232a8e4ecc21c8ee4c500900c26f706cab60150d (diff)
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spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use mode from .set_speed argument, and at the end priv->mode will initialized with mode. This patch also replaces formatting string to use speed instead of mode in .set_speed ops. Signed-off-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers/spi/zynq_qspi.c')
-rw-r--r--drivers/spi/zynq_qspi.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 0ce6127..8aa61d7 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -569,7 +569,8 @@ static int zynq_qspi_set_speed(struct udevice *bus, uint speed)
writel(confr, &regs->cr);
priv->freq = speed;
- debug("zynq_spi_set_speed: regs=%p, mode=%d\n", priv->regs, priv->freq);
+ debug("zynq_spi_set_speed: regs=%p, speed=%d\n",
+ priv->regs, priv->freq);
return 0;
}
@@ -584,9 +585,9 @@ static int zynq_qspi_set_mode(struct udevice *bus, uint mode)
confr = readl(&regs->cr);
confr &= ~(ZYNQ_QSPI_CR_CPHA_MASK | ZYNQ_QSPI_CR_CPOL_MASK);
- if (priv->mode & SPI_CPHA)
+ if (mode & SPI_CPHA)
confr |= ZYNQ_QSPI_CR_CPHA_MASK;
- if (priv->mode & SPI_CPOL)
+ if (mode & SPI_CPOL)
confr |= ZYNQ_QSPI_CR_CPOL_MASK;
writel(confr, &regs->cr);