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author | Tom Rini <trini@ti.com> | 2014-12-08 16:35:06 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-12-08 16:35:06 -0500 |
commit | 98d2d5e8c473232dc718763dbec284b7349dcc05 (patch) | |
tree | b4079534ce753b37a8bc772fcdb4527d51505246 /drivers/spi/ti_qspi.c | |
parent | 8bd60ccf532f0fec07609528c2b04a0725d83984 (diff) | |
parent | 956a8bae537974673e126f67a227355f27e48ec6 (diff) | |
download | u-boot-imx-98d2d5e8c473232dc718763dbec284b7349dcc05.zip u-boot-imx-98d2d5e8c473232dc718763dbec284b7349dcc05.tar.gz u-boot-imx-98d2d5e8c473232dc718763dbec284b7349dcc05.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-ti
Diffstat (limited to 'drivers/spi/ti_qspi.c')
-rw-r--r-- | drivers/spi/ti_qspi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index fd7fea8..857b604 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -102,7 +102,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) struct spi_slave *slave = &qslave->slave; u32 memval = 0; -#ifdef CONFIG_DRA7XX +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) slave->memory_map = (void *)MMAP_START_ADDR_DRA; #else slave->memory_map = (void *)MMAP_START_ADDR_AM43x; @@ -244,7 +244,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, uint status; int timeout; -#ifdef CONFIG_DRA7XX +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) int val; #endif @@ -254,7 +254,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &qslave->base->memswitch); -#ifdef CONFIG_DRA7XX +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) val = readl(CORE_CTRL_IO); val |= MEM_CS; writel(val, CORE_CTRL_IO); @@ -262,7 +262,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &qslave->base->memswitch); -#ifdef CONFIG_DRA7XX +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) val = readl(CORE_CTRL_IO); val &= MEM_CS_UNSELECT; writel(val, CORE_CTRL_IO); |