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author | Stefan Agner <stefan@agner.ch> | 2016-05-05 13:42:45 -0700 |
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committer | fang hui <hui.fang@nxp.com> | 2017-01-19 14:48:35 +0800 |
commit | 565648864c07221da689e9e26e0579ec8b600f8a (patch) | |
tree | ee74f39d4b5de75f48790f1724c53fb93495a07f /drivers/spi/sh_spi.h | |
parent | eeff4e073c6408bbfdac1a1fb7e4a35b4e1bf85e (diff) | |
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MA-9194 imx7d: fix ahb clock mux 1
The clock parent of the AHB root clock when using mux option 1
is the SYS PLL 270MHz clock. This is specified in Table 5-11
Clock Root Table of the i.MX 7Dual Applications Processor
Reference Manual.
While it could be a documentation error, the 270MHz parent is
also mentioned in the boot ROM configuration in Table 6-28: The
clock is by default at 135MHz due to a POST_PODF value of 1
(=> divider of 2).
Signed-off-by: Stefan Agner <stefan@agner.ch>
(cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
Change-Id: I5734f134a88249629dca0a956987a224f91744e9
Diffstat (limited to 'drivers/spi/sh_spi.h')
0 files changed, 0 insertions, 0 deletions