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authorThomas Chou <thomas@wytron.com.tw>2015-11-19 21:48:13 +0800
committerTom Rini <trini@konsulko.com>2015-11-21 21:50:17 -0500
commit4fb6055211b28c525fb45463ebe5da2757d9abc7 (patch)
treef606043e5e6eef43633cd41983c79b1873b164af /drivers/serial
parentc7b9686d5d482c8e952598841ea467e6ec0ec0de (diff)
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ns16550: zap CONFIG_NS16550_SERIAL
Zap CONFIG_NS16550_SERIAL, as the unification of ns16550 drivers is completed. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/Kconfig12
-rw-r--r--drivers/serial/ns16550.c4
2 files changed, 0 insertions, 16 deletions
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 1239416..fe407b7 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -186,18 +186,6 @@ config ALTERA_UART
Select this to enable an UART for Altera devices. Please find
details on the "Embedded Peripherals IP User Guide" of Altera.
-config NS16550_SERIAL
- bool "NS16550 UART or compatible"
- depends on DM_SERIAL
- default y if X86 || PPC || ARCH_ROCKCHIP
- help
- Support NS16550 UART or compatible with driver model. This can be
- enabled in the device tree with the correct input clock frequency.
- If the input clock frequency is not defined in the device tree,
- the macro CONFIG_SYS_NS16550_CLK defined in a legacy board header
- file will be used. It can be a constant or a function to get clock,
- eg, get_serial_clock().
-
config SANDBOX_SERIAL
bool "Sandbox UART support"
depends on SANDBOX
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index f0a9aac..d5bcbc3 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -404,7 +404,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
plat->base = addr;
plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"reg-shift", 1);
-#ifdef CONFIG_NS16550_SERIAL
plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"clock-frequency",
CONFIG_SYS_NS16550_CLK);
@@ -412,7 +411,6 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
debug("ns16550 clock not defined\n");
return -EINVAL;
}
-#endif /* CONFIG_NS16550_SERIAL */
return 0;
}
@@ -425,7 +423,6 @@ const struct dm_serial_ops ns16550_serial_ops = {
.setbrg = ns16550_serial_setbrg,
};
-#ifdef CONFIG_NS16550_SERIAL
#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id ns16550_serial_ids[] = {
{ .compatible = "ns16550" },
@@ -454,5 +451,4 @@ U_BOOT_DRIVER(ns16550_serial) = {
.probe = ns16550_serial_probe,
.ops = &ns16550_serial_ops,
};
-#endif /* CONFIG_NS16550_SERIAL */
#endif /* CONFIG_DM_SERIAL */