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author | Wolfgang Denk <wd@denx.de> | 2009-06-14 22:05:42 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2009-06-14 22:05:42 +0200 |
commit | 92afd368bba7d98b2b7bfb51082c3639bb2119b3 (patch) | |
tree | 74ffc8a3f4980f7c6bad6bf80bb41d3974eff685 /drivers/serial | |
parent | 6b1f78ae6ad037382ad430b07064105c88f7ac02 (diff) | |
parent | 388517e4b745b00256c2fa201ce7bccb67b4f245 (diff) | |
download | u-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.zip u-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.tar.gz u-boot-imx-92afd368bba7d98b2b7bfb51082c3639bb2119b3.tar.bz2 |
Merge branch 'next' of ../master
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/Makefile | 2 | ||||
-rw-r--r-- | drivers/serial/arm_dcc.c | 170 | ||||
-rw-r--r-- | drivers/serial/ns16550.c | 4 | ||||
-rw-r--r-- | drivers/serial/serial_lh7a40x.c | 184 | ||||
-rw-r--r-- | drivers/serial/serial_pxa.c | 385 |
5 files changed, 630 insertions, 115 deletions
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 14c818d..ab5d565 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -39,11 +39,13 @@ COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o COBJS-$(CONFIG_IXP_SERIAL) += serial_ixp.o COBJS-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o COBJS-$(CONFIG_LPC2292_SERIAL) += serial_lpc2292.o +COBJS-$(CONFIG_LH7A40X_SERIAL) += serial_lh7a40x.o COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o COBJS-$(CONFIG_MX31_UART) += serial_mx31.o COBJS-$(CONFIG_NETARM_SERIAL) += serial_netarm.o COBJS-$(CONFIG_PL010_SERIAL) += serial_pl01x.o COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o +COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index 5a7fb6b..dca73b9 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -29,69 +29,66 @@ #include <common.h> #include <devices.h> -#define DCC_ARM9_RBIT (1 << 0) -#define DCC_ARM9_WBIT (1 << 1) -#define DCC_ARM11_RBIT (1 << 30) -#define DCC_ARM11_WBIT (1 << 29) - -#define read_core_id(x) do { \ - __asm__ ("mrc p15, 0, %0, c0, c0, 0\n" : "=r" (x)); \ - x = (x >> 4) & 0xFFF; \ - } while (0); - +#if defined(CONFIG_CPU_V6) /* - * ARM9 + * ARMV6 */ -#define write_arm9_dcc(x) \ - __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) - -#define read_arm9_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) +#define DCC_RBIT (1 << 30) +#define DCC_WBIT (1 << 29) -#define status_arm9_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) -#define can_read_arm9_dcc(x) do { \ - status_arm9_dcc(x); \ - x &= DCC_ARM9_RBIT; \ - } while (0); +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) -#define can_write_arm9_dcc(x) do { \ - status_arm9_dcc(x); \ - x &= DCC_ARM9_WBIT; \ - x = (x == 0); \ - } while (0); +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) +#elif defined(CONFIG_CPU_XSCALE) /* - * ARM11 + * XSCALE */ -#define write_arm11_dcc(x) \ - __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) +#define DCC_RBIT (1 << 31) +#define DCC_WBIT (1 << 28) -#define read_arm11_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x)) -#define status_arm11_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x)) + +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) + +#else +#define DCC_RBIT (1 << 0) +#define DCC_WBIT (1 << 1) + +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) -#define can_read_arm11_dcc(x) do { \ - status_arm11_dcc(x); \ - x &= DCC_ARM11_RBIT; \ +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) + +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) + +#endif + +#define can_read_dcc(x) do { \ + status_dcc(x); \ + x &= DCC_RBIT; \ } while (0); -#define can_write_arm11_dcc(x) do { \ - status_arm11_dcc(x); \ - x &= DCC_ARM11_WBIT; \ - x = (x == 0); \ +#define can_write_dcc(x) do { \ + status_dcc(x); \ + x &= DCC_WBIT; \ + x = (x == 0); \ } while (0); #define TIMEOUT_COUNT 0x4000000 -static enum { - arm9_and_earlier, - arm11_and_later -} arm_type = arm9_and_earlier; - #ifndef CONFIG_ARM_DCC_MULTI #define arm_dcc_init serial_init void serial_setbrg(void) {} @@ -103,15 +100,6 @@ void serial_setbrg(void) {} int arm_dcc_init(void) { - register unsigned int id; - - read_core_id(id); - - if (id >= 0xb00) - arm_type = arm11_and_later; - else - arm_type = arm9_and_earlier; - return 0; } @@ -120,22 +108,10 @@ int arm_dcc_getc(void) int ch; register unsigned int reg; - switch (arm_type) { - case arm11_and_later: - do { - can_read_arm11_dcc(reg); - } while (!reg); - read_arm11_dcc(ch); - break; - - case arm9_and_earlier: - default: - do { - can_read_arm9_dcc(reg); - } while (!reg); - read_arm9_dcc(ch); - break; - } + do { + can_read_dcc(reg); + } while (!reg); + read_dcc(ch); return ch; } @@ -145,32 +121,15 @@ void arm_dcc_putc(char ch) register unsigned int reg; unsigned int timeout_count = TIMEOUT_COUNT; - switch (arm_type) { - case arm11_and_later: - while (--timeout_count) { - can_write_arm11_dcc(reg); - if (reg) - break; - } - if (timeout_count == 0) - return; - else - write_arm11_dcc(ch); - break; - - case arm9_and_earlier: - default: - while (--timeout_count) { - can_write_arm9_dcc(reg); - if (reg) - break; - } - if (timeout_count == 0) - return; - else - write_arm9_dcc(ch); - break; + while (--timeout_count) { + can_write_dcc(reg); + if (reg) + break; } + if (timeout_count == 0) + return; + else + write_dcc(ch); } void arm_dcc_puts(const char *s) @@ -183,15 +142,7 @@ int arm_dcc_tstc(void) { register unsigned int reg; - switch (arm_type) { - case arm11_and_later: - can_read_arm11_dcc(reg); - break; - case arm9_and_earlier: - default: - can_read_arm9_dcc(reg); - break; - } + can_read_dcc(reg); return reg; } @@ -214,13 +165,6 @@ int drv_arm_dcc_init(void) arm_dcc_dev.putc = arm_dcc_putc; /* 'putc' function */ arm_dcc_dev.puts = arm_dcc_puts; /* 'puts' function */ - rc = device_register(&arm_dcc_dev); - - if (rc == 0) { - arm_dcc_init(); - return 1; - } - - return 0; + return device_register(&arm_dcc_dev); } #endif diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 657c9da..2fcc8c3 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -17,7 +17,7 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; -#ifdef CONFIG_OMAP +#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = UART_LCR_BKSE | UART_LCRVAL; @@ -30,7 +30,7 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = UART_LCRVAL; -#if defined(CONFIG_OMAP) +#if defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ #else diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c new file mode 100644 index 0000000..4767489 --- /dev/null +++ b/drivers/serial/serial_lh7a40x.c @@ -0,0 +1,184 @@ +/* + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <lh7a40x.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_CONSOLE_UART1) +# define UART_CONSOLE 1 +#elif defined(CONFIG_CONSOLE_UART2) +# define UART_CONSOLE 2 +#elif defined(CONFIG_CONSOLE_UART3) +# define UART_CONSOLE 3 +#else +# error "No console configured ... " +#endif + +void serial_setbrg (void) +{ + lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); + int i; + unsigned int reg = 0; + + /* + * userguide 15.1.2.4 + * + * BAUDDIV is (UART_REF_FREQ/(16 X BAUD))-1 + * + * UART_REF_FREQ = external system clock input / 2 (Hz) + * BAUD is desired baudrate (bits/s) + * + * NOTE: we add (divisor/2) to numerator to round for + * more precision + */ + reg = (((get_PLLCLK()/2) + ((16*gd->baudrate)/2)) / (16 * gd->baudrate)) - 1; + uart->brcon = reg; + + for (i = 0; i < 100; i++); +} + +/* + * Initialise the serial port with the given baudrate. The settings + * are always 8 data bits, no parity, 1 stop bit, no start bits. + * + */ +int serial_init (void) +{ + lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); + + /* UART must be enabled before writing to any config registers */ + uart->con |= (UART_EN); + +#ifdef CONFIG_CONSOLE_UART1 + /* infrared disabled */ + uart->con |= UART_SIRD; +#endif + /* loopback disabled */ + uart->con &= ~(UART_LBE); + + /* modem lines and tx/rx polarities */ + uart->con &= ~(UART_MXP | UART_TXP | UART_RXP); + + /* FIFO enable, N81 */ + uart->fcon = (UART_WLEN_8 | UART_FEN | UART_STP2_1); + + /* set baudrate */ + serial_setbrg (); + + /* enable rx interrupt */ + uart->inten |= UART_RI; + + return (0); +} + +/* + * Read a single byte from the serial port. Returns 1 on success, 0 + * otherwise. When the function is succesfull, the character read is + * written into its argument c. + */ +int serial_getc (void) +{ + lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); + + /* wait for character to arrive */ + while (uart->status & UART_RXFE); + + return(uart->data & 0xff); +} + +#ifdef CONFIG_HWFLOW +static int hwflow = 0; /* turned off by default */ +int hwflow_onoff(int on) +{ + switch(on) { + case 0: + default: + break; /* return current */ + case 1: + hwflow = 1; /* turn on */ + break; + case -1: + hwflow = 0; /* turn off */ + break; + } + return hwflow; +} +#endif + +#ifdef CONFIG_MODEM_SUPPORT +static int be_quiet = 0; +void disable_putc(void) +{ + be_quiet = 1; +} + +void enable_putc(void) +{ + be_quiet = 0; +} +#endif + + +/* + * Output a single byte to the serial port. + */ +void serial_putc (const char c) +{ + lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); + +#ifdef CONFIG_MODEM_SUPPORT + if (be_quiet) + return; +#endif + + /* wait for room in the tx FIFO */ + while (!(uart->status & UART_TXFE)); + +#ifdef CONFIG_HWFLOW + /* Wait for CTS up */ + while(hwflow && !(uart->status & UART_CTS)); +#endif + + uart->data = c; + + /* If \n, also do \r */ + if (c == '\n') + serial_putc ('\r'); +} + +/* + * Test whether a character is in the RX buffer + */ +int serial_tstc (void) +{ + lh7a40x_uart_t* uart = LH7A40X_UART_PTR(UART_CONSOLE); + + return(!(uart->status & UART_RXFE)); +} + +void +serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c new file mode 100644 index 0000000..9ba457e --- /dev/null +++ b/drivers/serial/serial_pxa.c @@ -0,0 +1,385 @@ +/* + * (C) Copyright 2002 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Marius Groeger <mgroeger@sysgo.de> + * + * (C) Copyright 2002 + * Sysgo Real-Time Solutions, GmbH <www.elinos.com> + * Alex Zuepke <azu@sysgo.de> + * + * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include <common.h> +#include <watchdog.h> +#include <serial.h> +#include <asm/arch/pxa-regs.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define FFUART_INDEX 0 +#define BTUART_INDEX 1 +#define STUART_INDEX 2 + +#ifndef CONFIG_SERIAL_MULTI +#if defined (CONFIG_FFUART) +#define UART_INDEX FFUART_INDEX +#elif defined (CONFIG_BTUART) +#define UART_INDEX BTUART_INDEX +#elif defined (CONFIG_STUART) +#define UART_INDEX STUART_INDEX +#else +#error "Bad: you didn't configure serial ..." +#endif +#endif + +void pxa_setbrg_dev (unsigned int uart_index) +{ + unsigned int quot = 0; + + if (gd->baudrate == 1200) + quot = 768; + else if (gd->baudrate == 9600) + quot = 96; + else if (gd->baudrate == 19200) + quot = 48; + else if (gd->baudrate == 38400) + quot = 24; + else if (gd->baudrate == 57600) + quot = 16; + else if (gd->baudrate == 115200) + quot = 8; + else + hang (); + + switch (uart_index) { + case FFUART_INDEX: +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_22_FFUART; +#else + CKEN |= CKEN6_FFUART; +#endif /* CONFIG_CPU_MONAHANS */ + + FFIER = 0; /* Disable for now */ + FFFCR = 0; /* No fifos enabled */ + + /* set baud rate */ + FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; + FFDLL = quot & 0xff; + FFDLH = quot >> 8; + FFLCR = LCR_WLS0 | LCR_WLS1; + + FFIER = IER_UUE; /* Enable FFUART */ + break; + + case BTUART_INDEX: +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_21_BTUART; +#else + CKEN |= CKEN7_BTUART; +#endif /* CONFIG_CPU_MONAHANS */ + + BTIER = 0; + BTFCR = 0; + + /* set baud rate */ + BTLCR = LCR_DLAB; + BTDLL = quot & 0xff; + BTDLH = quot >> 8; + BTLCR = LCR_WLS0 | LCR_WLS1; + + BTIER = IER_UUE; /* Enable BFUART */ + + break; + + case STUART_INDEX: +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_23_STUART; +#else + CKEN |= CKEN5_STUART; +#endif /* CONFIG_CPU_MONAHANS */ + + STIER = 0; + STFCR = 0; + + /* set baud rate */ + STLCR = LCR_DLAB; + STDLL = quot & 0xff; + STDLH = quot >> 8; + STLCR = LCR_WLS0 | LCR_WLS1; + + STIER = IER_UUE; /* Enable STUART */ + break; + + default: + hang(); + } +} + + +/* + * Initialise the serial port with the given baudrate. The settings + * are always 8 data bits, no parity, 1 stop bit, no start bits. + * + */ +int pxa_init_dev (unsigned int uart_index) +{ + pxa_setbrg_dev (uart_index); + + return (0); +} + + +/* + * Output a single byte to the serial port. + */ +void pxa_putc_dev (unsigned int uart_index,const char c) +{ + switch (uart_index) { + case FFUART_INDEX: + /* wait for room in the tx FIFO on FFUART */ + while ((FFLSR & LSR_TEMT) == 0) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + FFTHR = c; + break; + + case BTUART_INDEX: + while ((BTLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + BTTHR = c; + break; + + case STUART_INDEX: + while ((STLSR & LSR_TEMT ) == 0 ) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + STTHR = c; + break; + } + + /* If \n, also do \r */ + if (c == '\n') + pxa_putc_dev (uart_index,'\r'); +} + +/* + * Read a single byte from the serial port. Returns 1 on success, 0 + * otherwise. When the function is succesfull, the character read is + * written into its argument c. + */ +int pxa_tstc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART_INDEX: + return FFLSR & LSR_DR; + case BTUART_INDEX: + return BTLSR & LSR_DR; + case STUART_INDEX: + return STLSR & LSR_DR; + } + return -1; +} + +/* + * Read a single byte from the serial port. Returns 1 on success, 0 + * otherwise. When the function is succesfull, the character read is + * written into its argument c. + */ +int pxa_getc_dev (unsigned int uart_index) +{ + switch (uart_index) { + case FFUART_INDEX: + while (!(FFLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) FFRBR & 0xff; + + case BTUART_INDEX: + while (!(BTLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) BTRBR & 0xff; + case STUART_INDEX: + while (!(STLSR & LSR_DR)) + WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */ + return (char) STRBR & 0xff; + } + return -1; +} + +void +pxa_puts_dev (unsigned int uart_index,const char *s) +{ + while (*s) { + pxa_putc_dev (uart_index,*s++); + } +} + +#if defined (CONFIG_FFUART) +static int ffuart_init(void) +{ + return pxa_init_dev(FFUART_INDEX); +} + +static void ffuart_setbrg(void) +{ + return pxa_setbrg_dev(FFUART_INDEX); +} + +static void ffuart_putc(const char c) +{ + return pxa_putc_dev(FFUART_INDEX,c); +} + +static void ffuart_puts(const char *s) +{ + return pxa_puts_dev(FFUART_INDEX,s); +} + +static int ffuart_getc(void) +{ + return pxa_getc_dev(FFUART_INDEX); +} + +static int ffuart_tstc(void) +{ + return pxa_tstc_dev(FFUART_INDEX); +} + +struct serial_device serial_ffuart_device = +{ + "serial_ffuart", + "PXA", + ffuart_init, + ffuart_setbrg, + ffuart_getc, + ffuart_tstc, + ffuart_putc, + ffuart_puts, +}; +#endif + +#if defined (CONFIG_BTUART) +static int btuart_init(void) +{ + return pxa_init_dev(BTUART_INDEX); +} + +static void btuart_setbrg(void) +{ + return pxa_setbrg_dev(BTUART_INDEX); +} + +static void btuart_putc(const char c) +{ + return pxa_putc_dev(BTUART_INDEX,c); +} + +static void btuart_puts(const char *s) +{ + return pxa_puts_dev(BTUART_INDEX,s); +} + +static int btuart_getc(void) +{ + return pxa_getc_dev(BTUART_INDEX); +} + +static int btuart_tstc(void) +{ + return pxa_tstc_dev(BTUART_INDEX); +} + +struct serial_device serial_btuart_device = +{ + "serial_btuart", + "PXA", + btuart_init, + btuart_setbrg, + btuart_getc, + btuart_tstc, + btuart_putc, + btuart_puts, +}; +#endif + +#if defined (CONFIG_STUART) +static int stuart_init(void) +{ + return pxa_init_dev(STUART_INDEX); +} + +static void stuart_setbrg(void) +{ + return pxa_setbrg_dev(STUART_INDEX); +} + +static void stuart_putc(const char c) +{ + return pxa_putc_dev(STUART_INDEX,c); +} + +static void stuart_puts(const char *s) +{ + return pxa_puts_dev(STUART_INDEX,s); +} + +static int stuart_getc(void) +{ + return pxa_getc_dev(STUART_INDEX); +} + +static int stuart_tstc(void) +{ + return pxa_tstc_dev(STUART_INDEX); +} + +struct serial_device serial_stuart_device = +{ + "serial_stuart", + "PXA", + stuart_init, + stuart_setbrg, + stuart_getc, + stuart_tstc, + stuart_putc, + stuart_puts, +}; +#endif + + +#ifndef CONFIG_SERIAL_MULTI +inline int serial_init(void) { + return (pxa_init_dev(UART_INDEX)); +} +void serial_setbrg(void) { + pxa_setbrg_dev(UART_INDEX); +} +int serial_getc(void) { + return(pxa_getc_dev(UART_INDEX)); +} +int serial_tstc(void) { + return(pxa_tstc_dev(UART_INDEX)); +} +void serial_putc(const char c) { + pxa_putc_dev(UART_INDEX,c); +} +void serial_puts(const char *s) { + pxa_puts_dev(UART_INDEX,s); +} +#endif /* CONFIG_SERIAL_MULTI */ |