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| author | Wolfgang Denk <wd@denx.de> | 2008-01-16 22:11:08 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-01-16 22:11:08 +0100 |
| commit | e715888010768d1ac313bc0416854e8a941370aa (patch) | |
| tree | c9dce6c79b28aab85b7973eda454ba44e178cad8 /drivers/serial | |
| parent | 4c9e98ace78e7de972adf7da7135a46ec0a4ee7e (diff) | |
| parent | f91d7ae5ca89acf9fa1ed1015dc078cf29581607 (diff) | |
| download | u-boot-imx-e715888010768d1ac313bc0416854e8a941370aa.zip u-boot-imx-e715888010768d1ac313bc0416854e8a941370aa.tar.gz u-boot-imx-e715888010768d1ac313bc0416854e8a941370aa.tar.bz2 | |
Merge branch 'master' of git://www.denx.de/git/u-boot-sh
Diffstat (limited to 'drivers/serial')
| -rw-r--r-- | drivers/serial/serial_sh.c | 36 |
1 files changed, 29 insertions, 7 deletions
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c index ee44ba2..00a9b39 100644 --- a/drivers/serial/serial_sh.c +++ b/drivers/serial/serial_sh.c @@ -30,24 +30,39 @@ #error "Default SCIF doesn't set....." #endif -#define SCSMR (vu_short *)(SCIF_BASE + 0x0) -#define SCBRR (vu_char *)(SCIF_BASE + 0x4) -#define SCSCR (vu_short *)(SCIF_BASE + 0x8) +/* Base register */ +#define SCSMR (vu_short *)(SCIF_BASE + 0x0) +#define SCBRR (vu_char *)(SCIF_BASE + 0x4) +#define SCSCR (vu_short *)(SCIF_BASE + 0x8) +#define SCFCR (vu_short *)(SCIF_BASE + 0x18) +#define SCFDR (vu_short *)(SCIF_BASE + 0x1C) +#ifdef CONFIG_SH7720 /* SH7720 specific */ +#define SCFSR (vu_short *)(SCIF_BASE + 0x14) /* SCSSR */ +#define SCFTDR (vu_char *)(SCIF_BASE + 0x20) +#define SCFRDR (vu_char *)(SCIF_BASE + 0x24) +#else #define SCFTDR (vu_char *)(SCIF_BASE + 0xC) #define SCFSR (vu_short *)(SCIF_BASE + 0x10) #define SCFRDR (vu_char *)(SCIF_BASE + 0x14) -#define SCFCR (vu_short *)(SCIF_BASE + 0x18) -#define SCFDR (vu_short *)(SCIF_BASE + 0x1C) +#endif + #if defined(CONFIG_SH4A) #define SCRFDR (vu_short *)(SCIF_BASE + 0x20) #define SCSPTR (vu_short *)(SCIF_BASE + 0x24) #define SCLSR (vu_short *)(SCIF_BASE + 0x28) #define SCRER (vu_short *)(SCIF_BASE + 0x2C) +#define LSR_ORER 1 #elif defined (CONFIG_SH4) #define SCSPTR (vu_short *)(SCIF_BASE + 0x20) #define SCLSR (vu_short *)(SCIF_BASE + 0x24) +#define LSR_ORER 1 #elif defined (CONFIG_SH3) -#define SCLSR (vu_short *)(SCIF_BASE + 0x24) +#ifdef CONFIG_SH7720 /* SH7720 specific */ +# define SCLSR SCFSR /* SCSSR */ +#else +# define SCLSR (vu_short *)(SCIF_BASE + 0x24) +#endif +#define LSR_ORER 0x0200 #endif #define SCR_RE (1 << 4) @@ -67,10 +82,18 @@ void serial_setbrg (void) { DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_CPU_SH7720) + int divisor = gd->baudrate * 16; + + *SCBRR = (CONFIG_SYS_CLK_FREQ * 2 + (divisor / 2)) / + (gd->baudrate * 32) - 1; +#else int divisor = gd->baudrate * 32; *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) / (gd->baudrate * 32) - 1; +#endif } int serial_init (void) @@ -133,7 +156,6 @@ int serial_tstc (void) #define FSR_ERR_CLEAR 0x0063 #define RDRF_CLEAR 0x00fc -#define LSR_ORER 1 void handle_error( void ){ (void)*SCFSR ; |