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author | Vikas Manocha <vikas.manocha@st.com> | 2016-01-26 18:12:20 -0800 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-02-08 10:10:36 -0500 |
commit | dffceb4b15e4c5fd2487e625a08062a8120bd17f (patch) | |
tree | 05a29103a2e5f7ae1b580d9b53cc75dcd9919d8c /drivers/serial | |
parent | 334a994a3c09607bc0a8f746ee2bbda5eaec3ede (diff) | |
download | u-boot-imx-dffceb4b15e4c5fd2487e625a08062a8120bd17f.zip u-boot-imx-dffceb4b15e4c5fd2487e625a08062a8120bd17f.tar.gz u-boot-imx-dffceb4b15e4c5fd2487e625a08062a8120bd17f.tar.bz2 |
serial: serial_stm32: move clock config from driver to board
This patch removes the uart clock enable from serial driver & move it in the
board code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/serial_stm32.c | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 91a5dde..c793ba6 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -35,24 +35,6 @@ struct stm32_usart { DECLARE_GLOBAL_DATA_PTR; -#define MAX_SERIAL_PORTS 4 - -/* - * RCC USART specific definitions - */ -#define RCC_ENR_USART1EN (1 << 4) -#define RCC_ENR_USART2EN (1 << 17) -#define RCC_ENR_USART3EN (1 << 18) -#define RCC_ENR_USART6EN (1 << 5) - -/* Array used to figure out which RCC bit needs to be set */ -static const unsigned long usart_port_rcc_pairs[MAX_SERIAL_PORTS][2] = { - { STM32_USART1_BASE, RCC_ENR_USART1EN }, - { STM32_USART2_BASE, RCC_ENR_USART2EN }, - { STM32_USART3_BASE, RCC_ENR_USART3EN }, - { STM32_USART6_BASE, RCC_ENR_USART6EN } -}; - static int stm32_serial_setbrg(struct udevice *dev, int baudrate) { struct stm32_serial_platdata *plat = dev->platdata; @@ -114,28 +96,6 @@ static int stm32_serial_probe(struct udevice *dev) { struct stm32_serial_platdata *plat = dev->platdata; struct stm32_usart *const usart = plat->base; - int usart_port = -1; - int i; - - for (i = 0; i < MAX_SERIAL_PORTS; i++) { - if ((u32)usart == usart_port_rcc_pairs[i][0]) { - usart_port = i; - break; - } - } - - if (usart_port == -1) - return -EINVAL; - - if (((u32)usart & STM32_BUS_MASK) == STM32_APB1PERIPH_BASE) - setbits_le32(&STM32_RCC->apb1enr, - usart_port_rcc_pairs[usart_port][1]); - else if (((u32)usart & STM32_BUS_MASK) == STM32_APB2PERIPH_BASE) - setbits_le32(&STM32_RCC->apb2enr, - usart_port_rcc_pairs[usart_port][1]); - else - return -EINVAL; - setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE); return 0; |