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authorTom Rini <trini@konsulko.com>2016-07-28 08:45:00 -0400
committerTom Rini <trini@konsulko.com>2016-07-28 08:45:00 -0400
commit4711e7f7af839b41a6d78490257a9e7975494dd3 (patch)
tree7fb01e8da7cee537ebd1a070c750da7c4cc43482 /drivers/serial
parentfe34b6a4845476208ca7d19a35179e56bebf3877 (diff)
parent77cbd3a14184c61d55d7fcddd88fa4e96efc9901 (diff)
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Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/serial_mxc.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index 1563bb3..8545714 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -76,6 +76,7 @@
#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */
#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */
#define UFCR_RFDIV_SHF 7 /* Reference freq divider shift */
+#define UFCR_DCEDTE (1<<6) /* DTE mode select */
#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */
#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */
#define USR1_RTSS (1<<14) /* RTS pin status */
@@ -269,8 +270,13 @@ int mxc_serial_setbrg(struct udevice *dev, int baudrate)
struct mxc_serial_platdata *plat = dev->platdata;
struct mxc_uart *const uart = plat->reg;
u32 clk = imx_get_uartclk();
+ u32 tmp;
+
+ tmp = 4 << UFCR_RFDIV_SHF;
+ if (plat->use_dte)
+ tmp |= UFCR_DCEDTE;
+ writel(tmp, &uart->fcr);
- writel(4 << 7, &uart->fcr); /* divide input clock by 2 */
writel(0xf, &uart->bir);
writel(clk / (2 * baudrate), &uart->bmr);