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authorHugo Villeneuve <hugo.villeneuve@lyrtech.com>2008-07-15 11:23:02 -0400
committerWolfgang Denk <wd@denx.de>2008-07-15 21:53:29 +0200
commitbcab74baa6b1b1c969038ab6f64a186239180405 (patch)
tree2e7ff3fc74b6fb49a4c2a9a7ac12111a03ddd600 /drivers/serial
parent0328ef0edfe950f0b7b8b368dae482531506b74a (diff)
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Round the serial port clock divisor value returned by calc_divisor()
Round the serial port clock divisor value returned by calc_divisor() Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r--drivers/serial/serial.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 4ccaee2..8bbfcf9 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -124,8 +124,6 @@ static NS16550_t serial_ports[4] = {
static int calc_divisor (NS16550_t port)
{
- uint32_t clk_divisor;
-
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
@@ -149,15 +147,11 @@ static int calc_divisor (NS16550_t port)
/* Compute divisor value. Normally, we should simply return:
* CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate
- * but we need to round that value by adding 0.5 (2/4).
+ * but we need to round that value by adding 0.5.
* Rounding is especially important at high baud rates.
*/
- clk_divisor = (((4 * CFG_NS16550_CLK) /
- (MODE_X_DIV * gd->baudrate)) + 2) / 4;
-
- debug("NS16550 clock divisor = %d\n", clk_divisor);
-
- return clk_divisor;
+ return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) /
+ (MODE_X_DIV * gd->baudrate);
}
#if !defined(CONFIG_SERIAL_MULTI)