Merge branch 'master' into next

5 files changed, 187 insertions, 55 deletions

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index eafe543..17235ff 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -38,6 +38,7 @@ COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
 COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SCIF_CONSOLE) += serial_sh.o
 COBJS-$(CONFIG_USB_TTY) += usbtty.o
+COBJS-$(CONFIG_VCTH_SERIAL) += vcth.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index f30532b..bfdb2ce 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -18,6 +18,7 @@
  */
 
 #include <common.h>
+#include <asm/io.h>
 #include <asm/processor.h>
 
 #if defined(CONFIG_CONS_SCIF0)
@@ -49,7 +50,7 @@
 # define SCFRDR	(vu_char  *)(SCIF_BASE + 0x24)
 #else
 # define SCFTDR (vu_char  *)(SCIF_BASE + 0xC)
-# define SCFSR 	(vu_short *)(SCIF_BASE + 0x10)
+# define SCFSR	(vu_short *)(SCIF_BASE + 0x10)
 # define SCFRDR (vu_char  *)(SCIF_BASE + 0x14)
 #endif
 
@@ -64,7 +65,7 @@
 #elif defined(CONFIG_CPU_SH7763)
 # if defined(CONFIG_CONS_SCIF2)
 # define SCSPTR	(vu_short *)(SCIF_BASE + 0x20)
-# define SCLSR 	(vu_short *)(SCIF_BASE + 0x24)
+# define SCLSR	(vu_short *)(SCIF_BASE + 0x24)
 # define LSR_ORER	1
 # define FIFOLEVEL_MASK	0x1F
 # else
@@ -90,11 +91,11 @@
 	defined(CONFIG_CPU_SH7722) || \
 	defined(CONFIG_CPU_SH7203)
 # define SCSPTR	(vu_short *)(SCIF_BASE + 0x20)
-# define SCLSR 	(vu_short *)(SCIF_BASE + 0x24)
+# define SCLSR	(vu_short *)(SCIF_BASE + 0x24)
 # define LSR_ORER	1
 # define FIFOLEVEL_MASK	0x1F
 #elif defined(CONFIG_CPU_SH7720)
-# define SCLSR		(vu_short *)(SCIF_BASE + 0x24)
+# define SCLSR		SCFSR
 # define LSR_ORER	0x0200
 # define FIFOLEVEL_MASK	0x1F
 #elif defined(CONFIG_CPU_SH7710) || \
@@ -106,42 +107,43 @@
 
 /* SCBRR register value setting */
 #if defined(CONFIG_CPU_SH7720)
-# define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
+# define SCBRR_VALUE(bps, clk) (((clk * 2) + 16 * bps) / (32 * bps) - 1)
 #elif defined(CONFIG_CPU_SH7723) && defined(CONFIG_SCIF_A)
 /* SH7723 SCIFA use bus clock. So clock *2 */
-# define SCBRR_VALUE(bps, clk) (((clk*2*2)+16*bps)/(32*bps)-1)
+# define SCBRR_VALUE(bps, clk) (((clk * 2 * 2) + 16 * bps) / (32 * bps) - 1)
 #else /* Generic SuperH */
-# define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
+# define SCBRR_VALUE(bps, clk) ((clk + 16 * bps) / (32 * bps) - 1)
 #endif
 
-#define SCR_RE 		(1 << 4)
-#define SCR_TE 		(1 << 5)
+#define SCR_RE		(1 << 4)
+#define SCR_TE		(1 << 5)
 #define FCR_RFRST	(1 << 1)	/* RFCL */
 #define FCR_TFRST	(1 << 2)	/* TFCL */
-#define FSR_DR   	(1 << 0)
-#define FSR_RDF  	(1 << 1)
-#define FSR_FER  	(1 << 3)
-#define FSR_BRK  	(1 << 4)
-#define FSR_FER  	(1 << 3)
-#define FSR_TEND 	(1 << 6)
-#define FSR_ER   	(1 << 7)
+#define FSR_DR		(1 << 0)
+#define FSR_RDF		(1 << 1)
+#define FSR_FER		(1 << 3)
+#define FSR_BRK		(1 << 4)
+#define FSR_FER		(1 << 3)
+#define FSR_TEND	(1 << 6)
+#define FSR_ER		(1 << 7)
 
 /*----------------------------------------------------------------------*/
 
 void serial_setbrg(void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
-	*SCBRR = SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ);
+
+	writeb(SCBRR_VALUE(gd->baudrate, CONFIG_SYS_CLK_FREQ), SCBRR);
 }
 
 int serial_init(void)
 {
-	*SCSCR = (SCR_RE | SCR_TE);
-	*SCSMR = 0;
-	*SCSMR = 0;
-	*SCFCR = (FCR_RFRST | FCR_TFRST);
-	*SCFCR;
-	*SCFCR = 0;
+	writew((SCR_RE | SCR_TE), SCSCR);
+	writew(0, SCSMR);
+	writew(0, SCSMR);
+	writew((FCR_RFRST | FCR_TFRST), SCFCR);
+	readw(SCFCR);
+	writew(0, SCFCR);
 
 	serial_setbrg();
 	return 0;
@@ -150,9 +152,9 @@ int serial_init(void)
 static int serial_rx_fifo_level(void)
 {
 #if defined(SCRFDR)
-	return (*SCRFDR >> 0) & FIFOLEVEL_MASK;
+	return (readw(SCRFDR) >> 0) & FIFOLEVEL_MASK;
 #else
-	return (*SCFDR >> 0) & FIFOLEVEL_MASK;
+	return (readw(SCFDR) >> 0) & FIFOLEVEL_MASK;
 #endif
 }
 
@@ -161,15 +163,15 @@ void serial_raw_putc(const char c)
 	unsigned int fsr_bits_to_clear;
 
 	while (1) {
-		if (*SCFSR & FSR_TEND) {	/* Tx fifo is empty */
+		if (readw(SCFSR) & FSR_TEND) { /* Tx fifo is empty */
 			fsr_bits_to_clear = FSR_TEND;
 			break;
 		}
 	}
 
-	*SCFTDR = c;
+	writeb(c, SCFTDR);
 	if (fsr_bits_to_clear != 0)
-		*SCFSR &= ~fsr_bits_to_clear;
+		writew(readw(SCFSR) & ~fsr_bits_to_clear, SCFSR);
 }
 
 void serial_putc(const char c)
@@ -191,26 +193,25 @@ int serial_tstc(void)
 	return serial_rx_fifo_level() ? 1 : 0;
 }
 
-#define FSR_ERR_CLEAR   0x0063
-#define RDRF_CLEAR      0x00fc
+#define FSR_ERR_CLEAR	0x0063
+#define RDRF_CLEAR		0x00fc
 void handle_error(void)
 {
-
-	(void)*SCFSR;
-	*SCFSR = FSR_ERR_CLEAR;
-	(void)*SCLSR;
-	*SCLSR = 0x00;
+	readw(SCFSR);
+	writew(FSR_ERR_CLEAR, SCFSR);
+	readw(SCLSR);
+	writew(0x00, SCLSR);
 }
 
 int serial_getc_check(void)
 {
 	unsigned short status;
 
-	status = *SCFSR;
+	status = readw(SCFSR);
 
 	if (status & (FSR_FER | FSR_ER | FSR_BRK))
 		handle_error();
-	if (*SCLSR & LSR_ORER)
+	if (readw(SCLSR) & LSR_ORER)
 		handle_error();
 	return status & (FSR_DR | FSR_RDF);
 }
@@ -223,15 +224,15 @@ int serial_getc(void)
 	while (!serial_getc_check())
 		;
 
-	ch = *SCFRDR;
-	status = *SCFSR;
+	ch = readb(SCFRDR);
+	status = readw(SCFSR);
 
-	*SCFSR = RDRF_CLEAR;
+	writew(RDRF_CLEAR, SCFSR);
 
 	if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK))
 		handle_error();
 
-	if (*SCLSR & LSR_ORER)
+	if (readw(SCLSR) & LSR_ORER)
 		handle_error();
 
 	return ch;
diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c
index e738c56..7eba470 100644
--- a/drivers/serial/usbtty.c
+++ b/drivers/serial/usbtty.c
@@ -22,16 +22,14 @@
  */
 
 #include <common.h>
-
+#include <config.h>
 #include <circbuf.h>
 #include <devices.h>
 #include "usbtty.h"
 #include "usb_cdc_acm.h"
 #include "usbdescriptors.h"
-#include <config.h>		/* If defined, override Linux identifiers with
-				 * vendor specific ones */
 
-#if 0
+#ifdef DEBUG
 #define TTYDBG(fmt,args...)\
 	serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
 #else
diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h
index 71c47bc..ecefde5 100644
--- a/drivers/serial/usbtty.h
+++ b/drivers/serial/usbtty.h
@@ -24,11 +24,11 @@
 #ifndef __USB_TTY_H__
 #define __USB_TTY_H__
 
-#include "usbdcore.h"
+#include <usbdcore.h>
 #if defined(CONFIG_PPC)
-#include "usbdcore_mpc8xx.h"
+#include <usbdcore_mpc8xx.h>
 #elif defined(CONFIG_ARM)
-#include "usbdcore_omap1510.h"
+#include <usbdcore_omap1510.h>
 #endif
 
 #include <version_autogenerated.h>
@@ -36,14 +36,25 @@
 /* If no VendorID/ProductID is defined in config.h, pretend to be Linux
  * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */
 
-#define CONFIG_USBD_VENDORID 0x0525	/* Linux/NetChip */
-#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6	/* gserial */
-#define CONFIG_USBD_PRODUCTID_CDCACM  0xa4a7	/* CDC ACM */
-#define CONFIG_USBD_MANUFACTURER "Das U-Boot"
-#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION
-
+#ifndef CONFIG_USBD_VENDORID
+#define CONFIG_USBD_VENDORID		0x0525	/* Linux/NetChip */
+#endif
+#ifndef CONFIG_USBD_PRODUCTID_GSERIAL
+#define CONFIG_USBD_PRODUCTID_GSERIAL	0xa4a6	/* gserial */
+#endif
+#ifndef CONFIG_USBD_PRODUCTID_CDCACM
+#define CONFIG_USBD_PRODUCTID_CDCACM	0xa4a7	/* CDC ACM */
+#endif
+#ifndef CONFIG_USBD_MANUFACTURER
+#define CONFIG_USBD_MANUFACTURER	"Das U-Boot"
+#endif
+#ifndef CONFIG_USBD_PRODUCT_NAME
+#define CONFIG_USBD_PRODUCT_NAME	U_BOOT_VERSION
+#endif
 
-#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB"
+#ifndef CONFIG_USBD_CONFIGURATION_STR
+#define CONFIG_USBD_CONFIGURATION_STR	"TTY via USB"
+#endif
 
 #define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
 #define CONFIG_USBD_SERIAL_OUT_PKTSIZE	UDC_OUT_PACKET_SIZE
diff --git a/drivers/serial/vcth.c b/drivers/serial/vcth.c
new file mode 100755
index 0000000..2c847d0
--- /dev/null
+++ b/drivers/serial/vcth.c
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+
+#define UART_1_BASE		0xBF89C000
+
+#define	UART_RBR_OFF		0x00	/* receiver buffer reg		*/
+#define	UART_THR_OFF		0x00	/* transmit holding  reg	*/
+#define	UART_DLL_OFF		0x00	/* divisor latch low reg	*/
+#define	UART_IER_OFF		0x04	/* interrupt enable reg		*/
+#define	UART_DLH_OFF		0x04	/* receiver buffer reg		*/
+#define	UART_FCR_OFF		0x08	/* fifo control register	*/
+#define	UART_LCR_OFF		0x0c	/* line control register	*/
+#define	UART_MCR_OFF		0x10	/* modem control register	*/
+#define	UART_LSR_OFF		0x14	/* line status register		*/
+#define	UART_MSR_OFF		0x18	/* modem status register	*/
+#define	UART_SCR_OFF		0x1c	/* scratch pad register		*/
+
+#define UART_RCV_DATA_RDY	0x01	/* Data Received		*/
+#define UART_XMT_HOLD_EMPTY	0x20
+#define UART_TRANSMIT_EMPTY	0x40
+
+/* 7 bit on line control reg. enalbing rw to dll and dlh */
+#define UART_LCR_DLAB		0x0080
+
+#define UART___9600_BDR		0x84
+#define UART__19200_BDR		0x42
+#define UART_115200_BDR		0x08
+
+#define UART_DIS_ALL_INTER	0x00	/* disable all interrupts	*/
+
+#define UART_5DATA_BITS		0x0000	/*   5 [bits]  1.5 bits   2	*/
+#define UART_6DATA_BITS		0x0001	/*   6 [bits]  1   bits   2	*/
+#define UART_7DATA_BITS		0x0002	/*   7 [bits]  1   bits   2	*/
+#define UART_8DATA_BITS		0x0003	/*   8 [bits]  1   bits   2	*/
+
+static void vcth_uart_set_baud_rate(u32 address, u32 dh, u32 dl)
+{
+	u32 val = __raw_readl(UART_1_BASE + UART_LCR_OFF);
+
+	/* set 7 bit on 1 */
+	val |= UART_LCR_DLAB;
+	__raw_writel(val, UART_1_BASE + UART_LCR_OFF);
+
+	__raw_writel(dl, UART_1_BASE + UART_DLL_OFF);
+	__raw_writel(dh, UART_1_BASE + UART_DLH_OFF);
+
+	/* set 7 bit on 0 */
+	val &= ~UART_LCR_DLAB;
+	__raw_writel(val, UART_1_BASE + UART_LCR_OFF);
+
+	return;
+}
+
+int serial_init(void)
+{
+	__raw_writel(UART_DIS_ALL_INTER, UART_1_BASE + UART_IER_OFF);
+	vcth_uart_set_baud_rate(UART_1_BASE, 0, UART_115200_BDR);
+	__raw_writel(UART_8DATA_BITS, UART_1_BASE + UART_LCR_OFF);
+
+	return 0;
+}
+
+void serial_setbrg(void)
+{
+	/*
+	 * Baudrate change not supported currently, fixed to 115200 baud
+	 */
+}
+
+void serial_putc(const char c)
+{
+	if (c == '\n')
+		serial_putc('\r');
+
+	while (!(UART_XMT_HOLD_EMPTY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))
+		;
+
+	__raw_writel(c, UART_1_BASE + UART_THR_OFF);
+}
+
+void serial_puts(const char *s)
+{
+	while (*s)
+		serial_putc(*s++);
+}
+
+int serial_getc(void)
+{
+	while (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))
+		;
+
+	return __raw_readl(UART_1_BASE + UART_RBR_OFF) & 0xff;
+}
+
+int serial_tstc(void)
+{
+	if (!(UART_RCV_DATA_RDY & __raw_readl(UART_1_BASE + UART_LSR_OFF)))
+		return 0;
+
+	return 1;
+}