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author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-02-27 02:26:47 +0900 |
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committer | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2015-03-01 00:02:26 +0900 |
commit | 099cf77c155ffd9aef7c3783c608d7574177bda9 (patch) | |
tree | a63b50f245a9e697f59fc81e976c68f224659a12 /drivers/serial | |
parent | d0c47b3ef7c582ec984edeba08984b0acc2ffcba (diff) | |
download | u-boot-imx-099cf77c155ffd9aef7c3783c608d7574177bda9.zip u-boot-imx-099cf77c155ffd9aef7c3783c608d7574177bda9.tar.gz u-boot-imx-099cf77c155ffd9aef7c3783c608d7574177bda9.tar.bz2 |
serial: UniPhier: move LCR register setting to probe function
We do not have to set the LCR register every time we change the
baud-rate. We just need to set it up once in the probe function.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/serial_uniphier.c | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index 327e0dc..a6bd27f 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -45,12 +45,6 @@ static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); const unsigned int mode_x_div = 16; unsigned int divisor; - u32 tmp; - - tmp = readl(&port->lcr_mcr); - tmp &= ~LCR_MASK; - tmp |= UART_LCR_WLEN8 << LCR_SHIFT; - writel(tmp, &port->lcr_mcr); divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate); @@ -93,14 +87,22 @@ static int uniphier_serial_pending(struct udevice *dev, bool input) static int uniphier_serial_probe(struct udevice *dev) { + u32 tmp; struct uniphier_serial_private_data *priv = dev_get_priv(dev); struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); + struct uniphier_serial __iomem *port; - priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial)); - - if (!priv->membase) + port = map_sysmem(plat->base, sizeof(struct uniphier_serial)); + if (!port) return -ENOMEM; + priv->membase = port; + + tmp = readl(&port->lcr_mcr); + tmp &= ~LCR_MASK; + tmp |= UART_LCR_WLEN8 << LCR_SHIFT; + writel(tmp, &port->lcr_mcr); + return 0; } |