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| author | Lionel Xu <r63889@freescale.com> | 2009-07-31 15:14:01 +0800 |
|---|---|---|
| committer | Fred Fan <r01011@freescale.com> | 2009-09-10 17:08:10 +0800 |
| commit | 9f649aed95b9b0f860236e9ff96ba0ddb091be91 (patch) | |
| tree | 54f512a978e58291934ccbeb2530f7d3657d819c /drivers/serial/stmp3xxx_dbguart.h | |
| parent | ecbbc581c9f54a3512cd3f6ef42562b1cf047d35 (diff) | |
| download | u-boot-imx-9f649aed95b9b0f860236e9ff96ba0ddb091be91.zip u-boot-imx-9f649aed95b9b0f860236e9ff96ba0ddb091be91.tar.gz u-boot-imx-9f649aed95b9b0f860236e9ff96ba0ddb091be91.tar.bz2 | |
ENGR00113941 MX233: Make UBOOT v2009.01 work on EVK board
Porting MX233 UBOOT from 1.3.3 to V2009.01. Clear old cfg macro, such as
CFG_HZ. Change MAC address getting source from initial configuration to
On-Chip OTP.
Signed-off-by: Lionel Xu <r63889@freescale.com>
Diffstat (limited to 'drivers/serial/stmp3xxx_dbguart.h')
| -rw-r--r-- | drivers/serial/stmp3xxx_dbguart.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/drivers/serial/stmp3xxx_dbguart.h b/drivers/serial/stmp3xxx_dbguart.h new file mode 100644 index 0000000..5ad4a85 --- /dev/null +++ b/drivers/serial/stmp3xxx_dbguart.h @@ -0,0 +1,61 @@ +/* + * Debug UART register definitions + * (C) Copyright 2009 Freescale Semiconductor, Inc. + */ + +#ifndef STMP3XXX_DBGUART_H +#define STMP3XXX_DBGUART_H + +#include <asm/arch/dbguart.h> + +#define UARTDBGDR 0x00 +#define UARTDBGRSR_ECR 0x04 +#define UARTDBGFR 0x18 +#define UARTDBGILPR 0x20 +#define UARTDBGIBRD 0x24 +#define UARTDBGFBRD 0x28 +#define UARTDBGLCR_H 0x2c +#define UARTDBGCR 0x30 +#define UARTDBGIFLS 0x34 +#define UARTDBGIMSC 0x38 +#define UARTDBGRIS 0x3c +#define UARTDBGMIS 0x40 +#define UARTDBGICR 0x44 +#define UARTDBGDMACR 0x48 + +/* UARTDBGFR - Flag Register bits */ +#define CTS 0x0001 +#define DSR 0x0002 +#define DCD 0x0004 +#define BUSY 0x0008 +#define RXFE 0x0010 +#define TXFF 0x0020 +#define RXFF 0x0040 +#define TXFE 0x0080 +#define RI 0x0100 + +/* UARTDBGLCR_H - Line Control Register bits */ +#define BRK 0x0001 +#define PEN 0x0002 +#define EPS 0x0004 +#define STP2 0x0008 +#define FEN 0x0010 +#define WLEN5 0x0000 +#define WLEN6 0x0020 +#define WLEN7 0x0040 +#define WLEN8 0x0060 +#define SPS 0x0080 + +/* UARTDBGCR - Control Register bits */ +#define UARTEN 0x0001 +#define LBE 0x0080 +#define TXE 0x0100 +#define RXE 0x0200 +#define DTR 0x0400 +#define RTS 0x0800 +#define OUT1 0x1000 +#define OUT2 0x2000 +#define RTSEN 0x4000 +#define CTSEN 0x8000 + +#endif /* STMP3XXX_DBGUART_H */ |