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authorPhil Edworthy <PHIL.EDWORTHY@renesas.com>2011-06-01 07:35:13 +0100
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>2011-08-22 13:16:08 +0900
commit7fbeb6422d9fb32063c8357fcdee99f0088a1a7f (patch)
tree38ec79a5bd9f7c4784bc6e518b848bc95e894785 /drivers/serial/serial_sh.h
parentfa82f871c8dbc9a15e8dc274b3f99dd5fa0da458 (diff)
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sh: Add Renesas rsk7264 board
The rsk7264 (also know as rsk2+sh7264) is an SH2A based board with 64MB NAND flash and 64MB SDRAM. It is very similar to the rsk7203 board. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/serial/serial_sh.h')
-rw-r--r--drivers/serial/serial_sh.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index e19593c..4e16e48 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -177,7 +177,8 @@ struct uart_port {
#elif defined(CONFIG_CPU_SH7201) || \
defined(CONFIG_CPU_SH7203) || \
defined(CONFIG_CPU_SH7206) || \
- defined(CONFIG_CPU_SH7263)
+ defined(CONFIG_CPU_SH7263) || \
+ defined(CONFIG_CPU_SH7264)
# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
@@ -685,6 +686,8 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk)
#define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
#elif defined(__H8300H__) || defined(__H8300S__)
#define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
+#elif defined(CONFIG_CPU_SH7264)
+#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps))
#else /* Generic SH */
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
#endif