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authorWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
committerWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
commit0ea91423f47461bf7eaed2d4aff198076dd07fd5 (patch)
treeb5201f976fe3f7f5ed6f485f7ef81d8d8c9ec033 /drivers/serial/atmel_usart.c
parentce6400a0f88f9648d6def519244ea8c33c7612b2 (diff)
parent24890f11980eb70d835ca7e0b00d32284d8f546c (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits) avr32: add ATAG_BOARDINFO at91: reworked support for otc570 board at91: reworked support for meesc board hammerhead: move CONFIG_SYS_TEXT_BASE to header mimc200: move CONFIG_SYS_TEXT_BASE to header favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header atstk100x: move CONFIG_SYS_TEXT_BASE to header atngw100: move CONFIG_SYS_TEXT_BASE to header mimc200: fix "#define XXXX 1" hammerhead: fix "#define XXXX 1" favr-32-ezkit: fix "#define XXXX 1" atstk1006: fix "#define XXXX 1" atstk1004: fix "#define XXXX 1" atstk1003: fix "#define XXXX 1" atstk1002: fix "#define XXXX 1" atngw100: fix "#define XXXX 1" avr32: use single linker script avr32/config.mk: simplify PLATFORM_RELFLAGS avr32: fix linking Add support for Bluewater Systems Snapper 9260 and 9G20 modules ...
Diffstat (limited to 'drivers/serial/atmel_usart.c')
-rw-r--r--drivers/serial/atmel_usart.c28
1 files changed, 7 insertions, 21 deletions
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index bfa1f3a..e326b2b 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -23,21 +23,7 @@
#include <asm/io.h>
#include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
-
-#if defined(CONFIG_USART0)
-# define USART_ID 0
-# define USART_BASE USART0_BASE
-#elif defined(CONFIG_USART1)
-# define USART_ID 1
-# define USART_BASE USART1_BASE
-#elif defined(CONFIG_USART2)
-# define USART_ID 2
-# define USART_BASE USART2_BASE
-#elif defined(CONFIG_USART3)
-# define USART_ID 3
-# define USART_BASE USART3_BASE
-#endif
+#include <asm/arch/hardware.h>
#include "atmel_usart.h"
@@ -45,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
void serial_setbrg(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
unsigned long divisor;
unsigned long usart_hz;
@@ -54,14 +40,14 @@ void serial_setbrg(void)
* Baud Rate = --------------
* 16 * CD
*/
- usart_hz = get_usart_clk_rate(USART_ID);
+ usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
writel(USART3_BF(CD, divisor), &usart->brgr);
}
int serial_init(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
@@ -80,7 +66,7 @@ int serial_init(void)
void serial_putc(char c)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
if (c == '\n')
serial_putc('\r');
@@ -97,7 +83,7 @@ void serial_puts(const char *s)
int serial_getc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
WATCHDOG_RESET();
@@ -106,6 +92,6 @@ int serial_getc(void)
int serial_tstc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
}